armv7a: fix scan-build warnings
[openocd.git] / src / target / armv7a.c
index 0bac27fa15a740833e5eee5c844803cd00f942b8..67c563e67e17bf202174e9888d4045cce76dd26d 100644 (file)
@@ -87,7 +87,7 @@ done:
        /* (void) */ dpm->finish(dpm);
 }
 
-int armv7a_read_ttbcr(struct target *target)
+static int armv7a_read_ttbcr(struct target *target)
 {
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct arm_dpm *dpm = armv7a->armv4_5_common.dpm;
@@ -147,6 +147,8 @@ int armv7a_mmu_translate_va(struct target *target,  uint32_t va, uint32_t *val)
        retval = dpm->instr_read_data_r0(dpm,
                        ARMV4_5_MRC(15, 0, 0, 2, 0, ttb),
                        &ttb);
+       if (retval != ERROR_OK)
+               return retval;
        retval = armv7a->armv7a_mmu.read_physical_memory(target,
                        (ttb & 0xffffc000) | ((va & 0xfff00000) >> 18),
                        4, 1, (uint8_t*)&first_lvl_descriptor);
@@ -454,15 +456,13 @@ static int armv7a_handle_l2x_cache_info_command(struct command_context *cmd_ctx,
 }
 
 
-int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t way)
+static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t way)
 {
        struct armv7a_l2x_cache *l2x_cache;
        struct target_list *head = target->head;
        struct target *curr;
 
        struct armv7a_common *armv7a = target_to_armv7a(target);
-       if (armv7a == NULL)
-               LOG_ERROR("not an armv7a target");
        l2x_cache = calloc(1, sizeof(struct armv7a_l2x_cache));
        l2x_cache->base = base;
        l2x_cache->way = way;
@@ -542,7 +542,7 @@ int armv7a_handle_cache_info_command(struct command_context *cmd_ctx,
 
 
 /*  retrieve core id cluster id  */
-int arnv7a_read_mpidr(struct target *target)
+static int armv7a_read_mpidr(struct target *target)
 {
     int retval = ERROR_FAIL;
        struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -616,6 +616,7 @@ int armv7a_identify_cache(struct target *target)
                        2, 0,   /* op1, op2 */
                        0, 0,   /* CRn, CRm */
                        &cache_selected);
+       if (retval!=ERROR_OK) goto done;
        /* select instruction cache*/
        /*  MCR p15, 2,<Rd>, c0, c0, 0; Write CSSELR */
        /*  [0]  : 1 instruction cache selection , 0 data cache selection */
@@ -711,7 +712,7 @@ int armv7a_identify_cache(struct target *target)
 
 done:
        dpm->finish(dpm);
-        arnv7a_read_mpidr(target);
+       armv7a_read_mpidr(target);
        return retval;
 
 }

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