armv4_5: Improve arm_blank_check_memory() error handling

[openocd.git] / src / target / armv4_5.c

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index dc77af2b158830b628a78ba39a462d684551698d..18ce7df316c5f7e4397315a5dda1ef096510bec1 100644 (file)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -140,6 +140,12 @@ static const struct {
                .n_indices = ARRAY_SIZE(arm_mon_indices),
                .indices = arm_mon_indices,
        },
+       {
+               .name = "Secure Monitor ARM1176JZF-S",
+               .psr = ARM_MODE_1176_MON,
+               .n_indices = ARRAY_SIZE(arm_mon_indices),
+               .indices = arm_mon_indices,
+       },
 
        /* These special modes are currently only supported
         * by ARMv6M and ARMv7M profiles */
@@ -199,6 +205,7 @@ int arm_mode_to_number(enum arm_mode mode)
                case ARM_MODE_SYS:
                        return 6;
                case ARM_MODE_MON:
+               case ARM_MODE_1176_MON:
                        return 7;
                default:
                        LOG_ERROR("invalid mode value encountered %d", mode);
@@ -555,8 +562,10 @@ static int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf)
                        LOG_DEBUG("changing ARM core mode to '%s'",
                                arm_mode_name(value & 0x1f));
                        value &= ~((1 << 24) | (1 << 5));
+                       uint8_t t[4];
+                       buf_set_u32(t, 0, 32, value);
                        armv4_5_target->write_core_reg(target, reg,
-                               16, ARM_MODE_ANY, value);
+                               16, ARM_MODE_ANY, t);
                }
        } else {
                buf_set_u32(reg->value, 0, 32, value);
@@ -605,10 +614,10 @@ struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm)
                reg_arch_info[i].target = target;
                reg_arch_info[i].arm = arm;
 
-               reg_list[i].name = (char *) arm_core_regs[i].name;
+               reg_list[i].name = arm_core_regs[i].name;
                reg_list[i].number = arm_core_regs[i].gdb_index;
                reg_list[i].size = 32;
-               reg_list[i].value = &reg_arch_info[i].value;
+               reg_list[i].value = reg_arch_info[i].value;
                reg_list[i].type = &arm_reg_type;
                reg_list[i].arch_info = &reg_arch_info[i];
                reg_list[i].exist = true;
@@ -1542,7 +1551,7 @@ int arm_blank_check_memory(struct target *target,
                                + i * sizeof(uint32_t),
                                check_code[i]);
                if (retval != ERROR_OK)
-                       return retval;
+                       goto cleanup;
        }
 
        arm_algo.common_magic = ARM_COMMON_MAGIC;
@@ -1566,23 +1575,18 @@ int arm_blank_check_memory(struct target *target,
                        check_algorithm->address,
                        exit_var,
                        10000, &arm_algo);
-       if (retval != ERROR_OK) {
-               destroy_reg_param(&reg_params[0]);
-               destroy_reg_param(&reg_params[1]);
-               destroy_reg_param(&reg_params[2]);
-               target_free_working_area(target, check_algorithm);
-               return retval;
-       }
 
-       *blank = buf_get_u32(reg_params[2].value, 0, 32);
+       if (retval == ERROR_OK)
+               *blank = buf_get_u32(reg_params[2].value, 0, 32);
 
        destroy_reg_param(&reg_params[0]);
        destroy_reg_param(&reg_params[1]);
        destroy_reg_param(&reg_params[2]);
 
+cleanup:
        target_free_working_area(target, check_algorithm);
 
-       return ERROR_OK;
+       return retval;
 }
 
 static int arm_full_context(struct target *target)