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cortex_a : optimize apb read/write access.
[openocd.git] / src / target / arm_adi_v5.c
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index fd3a92ce3f45c0a3946bff69dfc3241eb16b8e0f..b17fd410f353453b01519672382bf0040cec3776 100644 (file)
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -262,16 +262,17 @@ int mem_ap_write_atomic_u32(struct adiv5_dap *dap, uint32_t address,
 
 /*****************************************************************************
 *                                                                            *
-* mem_ap_write_buf(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address) *
+* mem_ap_write_buf(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address, bool addr_incr) *
 *                                                                            *
 * Write a buffer in target order (little endian)                             *
 *                                                                            *
 *****************************************************************************/
-int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address, bool addr_incr)
 {
        int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK;
        uint32_t adr = address;
        const uint8_t *pBuffer = buffer;
+       uint32_t incr_flag = CSW_ADDRINC_OFF;
 
        count >>= 2;
        wcount = count;
@@ -302,13 +303,17 @@ int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count
                if (blocksize == 0)
                        blocksize = 1;
 
-               retval = dap_setup_accessport(dap, CSW_32BIT | CSW_ADDRINC_SINGLE, address);
+               if (addr_incr)
+                       incr_flag = CSW_ADDRINC_SINGLE;
+
+               retval = dap_setup_accessport(dap, CSW_32BIT | incr_flag, address);
                if (retval != ERROR_OK)
                        return retval;
 
                for (writecount = 0; writecount < blocksize; writecount++) {
-                       retval = dap_queue_ap_write(dap, AP_REG_DRW,
-                               *(uint32_t *) ((void *) (buffer + 4 * writecount)));
+                       uint32_t tmp;
+                       tmp = buf_get_u32(buffer + 4 * writecount, 0, 32);
+                       retval = dap_queue_ap_write(dap, AP_REG_DRW, tmp);
                        if (retval != ERROR_OK)
                                break;
                }
@@ -316,7 +321,8 @@ int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count
                retval = dap_run(dap);
                if (retval == ERROR_OK) {
                        wcount = wcount - blocksize;
-                       address = address + 4 * blocksize;
+                       if (addr_incr)
+                               address = address + 4 * blocksize;
                        buffer = buffer + 4 * blocksize;
                } else
                        errorcount++;
@@ -546,14 +552,16 @@ extern int adi_jtag_dp_scan(struct adiv5_dap *dap,
  * @param buffer where the words will be stored (in host byte order).
  * @param count How many words to read.
  * @param address Memory address from which to read words; all the
+ * @param addr_incr if true, increment the source address for each u32
  *     words must be readable by the currently selected MEM-AP.
  */
 int mem_ap_read_buf_u32(struct adiv5_dap *dap, uint8_t *buffer,
-               int count, uint32_t address)
+               int count, uint32_t address, bool addr_incr)
 {
        int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK;
        uint32_t adr = address;
        uint8_t *pBuffer = buffer;
+       uint32_t incr_flag = CSW_ADDRINC_OFF;
 
        count >>= 2;
        wcount = count;
@@ -572,7 +580,10 @@ int mem_ap_read_buf_u32(struct adiv5_dap *dap, uint8_t *buffer,
                if (blocksize == 0)
                        blocksize = 1;
 
-               retval = dap_setup_accessport(dap, CSW_32BIT | CSW_ADDRINC_SINGLE,
+               if (addr_incr)
+                       incr_flag = CSW_ADDRINC_SINGLE;
+
+               retval = dap_setup_accessport(dap, CSW_32BIT | incr_flag,
                                address);
                if (retval != ERROR_OK)
                        return retval;
@@ -621,7 +632,8 @@ int mem_ap_read_buf_u32(struct adiv5_dap *dap, uint8_t *buffer,
                        return retval;
                }
                wcount = wcount - blocksize;
-               address += 4 * blocksize;
+               if (addr_incr)
+                       address += 4 * blocksize;
                buffer += 4 * blocksize;
        }
 
@@ -880,11 +892,18 @@ int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
        return mem_ap_read_buf_u16(swjdp, buffer, count, address);
 }
 
+int mem_ap_sel_read_buf_u32_noincr(struct adiv5_dap *swjdp, uint8_t ap,
+               uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_read_buf_u32(swjdp, buffer, count, address, false);
+}
+
 int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
                uint8_t *buffer, int count, uint32_t address)
 {
        dap_ap_select(swjdp, ap);
-       return mem_ap_read_buf_u32(swjdp, buffer, count, address);
+       return mem_ap_read_buf_u32(swjdp, buffer, count, address, true);
 }
 
 int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
@@ -905,7 +924,14 @@ int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
                const uint8_t *buffer, int count, uint32_t address)
 {
        dap_ap_select(swjdp, ap);
-       return mem_ap_write_buf_u32(swjdp, buffer, count, address);
+       return mem_ap_write_buf_u32(swjdp, buffer, count, address, true);
+}
+
+int mem_ap_sel_write_buf_u32_noincr(struct adiv5_dap *swjdp, uint8_t ap,
+               const uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_write_buf_u32(swjdp, buffer, count, address, false);
 }
 
 #define MDM_REG_STAT           0x00
@@ -1265,6 +1291,8 @@ int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
                        retval = mem_ap_read_atomic_u32(dap,
                                        (component_base & 0xfffff000) | 0xfcc,
                                        &devtype);
+                       if (retval != ERROR_OK)
+                               return retval;
                        if ((devtype & 0xff) == type) {
                                *addr = component_base;
                                retval = ERROR_OK;
@@ -1584,6 +1612,10 @@ static int dap_info_command(struct command_context *cmd_ctx,
                                        type = "Cortex-M3 FBP";
                                        full = "(Flash Patch and Breakpoint)";
                                        break;
+                               case 0x00c:
+                                       type = "Cortex-M4 SCS";
+                                       full = "(System Control Space)";
+                                       break;
                                case 0x00d:
                                        type = "CoreSight ETM11";
                                        full = "(Embedded Trace)";
@@ -1633,10 +1665,18 @@ static int dap_info_command(struct command_context *cmd_ctx,
                                        type = "Cortex-M3 ETM";
                                        full = "(Embedded Trace)";
                                        break;
+                               case 0x925:
+                                       type = "Cortex-M4 ETM";
+                                       full = "(Embedded Trace)";
+                                       break;
                                case 0x930:
                                        type = "Cortex-R4 ETM";
                                        full = "(Embedded Trace)";
                                        break;
+                               case 0x9a1:
+                                       type = "Cortex-M4 TPUI";
+                                       full = "(Trace Port Interface Unit)";
+                                       break;
                                case 0xc08:
                                        type = "Cortex-A8 Debug";
                                        full = "(Debug Unit)";
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