build: cleanup src/jtag/drivers directory

[openocd.git] / src / jtag / drivers / rlink_dtc_cmd.h

diff --git a/src/jtag/drivers/rlink_dtc_cmd.h b/src/jtag/drivers/rlink_dtc_cmd.h
index 989750982be0c2a93b8f31227f32fc3b8c3e3c58..4fa8a66c3c9e166f1bb4d0fcd18a1b58447da9ad 100644 (file)
--- a/src/jtag/drivers/rlink_dtc_cmd.h
+++ b/src/jtag/drivers/rlink_dtc_cmd.h
@@ -18,7 +18,8 @@
  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
 
-/* A command position with the high nybble of 0x0 is reserved for an error condition.  If executed, it stops the DTC and raises the ERROR flag */
+/* A command position with the high nybble of 0x0 is reserved for an error condition.
+ * If executed, it stops the DTC and raises the ERROR flag */
 
 #define DTC_CMD_SHIFT_TMS_BYTES(bytes) ((0x1 << 4) | ((bytes) - 1))
 /* Shift 1-16 bytes out TMS. TDI is 0. */
@@ -46,10 +47,15 @@
 ) | (\
                (tdo) ? (1 << 3) : 0    \
 ))
-/* Single bit shift. */
-/* tms and tdi are the levels shifted out on TMS and TDI, respectively. */
-/* tdo indicates whether a byte will be returned in the reply buffer with its least significant bit set to reflect TDO */
-/* Care should be taken when tdo is zero, as the underlying code actually does put that byte in the reply buffer.  Setting tdo to zero just moves the pointer back.  The result is that if this command is executed when the reply buffer is already full, a byte will be written erroneously to memory not belonging to the reply buffer.  This could be worked around at the expense of DTC code space and speed. */
+/* Single bit shift.
+ * tms and tdi are the levels shifted out on TMS and TDI, respectively.
+ * tdo indicates whether a byte will be returned in the reply buffer with its
+ * least significant bit set to reflect TDO
+ * Care should be taken when tdo is zero, as the underlying code actually does put
+ * that byte in the reply buffer. Setting tdo to zero just moves the pointer back.
+ * The result is that if this command is executed when the reply buffer is already full,
+ * a byte will be written erroneously to memory not belonging to the reply buffer.
+ * This could be worked around at the expense of DTC code space and speed. */
 
 #define DTC_CMD_SHIFT_TMS_BITS(bits)   ((0x9 << 4) | ((bits) - 1))
 /* Shift 1-8 bits out TMS. */
@@ -60,7 +66,8 @@
 /* Bits to be shifted out are left justified in the following byte. */
 /* Bits shifted in are right justified in the byte placed in the reply buffer. */
 
-
 #define DTC_CMD_STOP                   (0xf << 4)
 /* Stop processing the command buffer and wait for the next one. */
-/* A shared status byte is updated with bit 0 set when this has happened, and it is cleared when a new command buffer becomes ready.  The host can poll that byte to see when it is safe to read a reply. */
+/* A shared status byte is updated with bit 0 set when this has happened,
+ * and it is cleared when a new command buffer becomes ready.
+ * The host can poll that byte to see when it is safe to read a reply. */