Add comments and tiny improvements to STM32 flash loader algorithm

[openocd.git] / src / flash / nor / stm32x.c

diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c
index 6b46afc8d543bdfefe10b9365d12b441a1cba343..7779ea3aa9b21514f47b7ebe23cc448895660f1f 100644 (file)
--- a/src/flash/nor/stm32x.c
+++ b/src/flash/nor/stm32x.c
@@ -503,25 +503,26 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
        /* see contib/loaders/flash/stm32x.s for src */
 
        static const uint8_t stm32x_flash_write_code[] = {
+                                                                       /* #define STM32_FLASH_CR_OFFSET        0x10 */
+                                                                       /* #define STM32_FLASH_SR_OFFSET        0x0C */
                                                                        /* write: */
-               0xDF, 0xF8, 0x24, 0x40,         /* ldr  r4, STM32_FLASH_CR */
-               0x09, 0x4D,                                     /* ldr  r5, STM32_FLASH_SR */
-               0x4F, 0xF0, 0x01, 0x03,         /* mov  r3, #1 */
-               0x23, 0x60,                                     /* str  r3, [r4, #0] */
-               0x30, 0xF8, 0x02, 0x3B,         /* ldrh r3, [r0], #2 */
-               0x21, 0xF8, 0x02, 0x3B,         /* strh r3, [r1], #2 */
+               0xdf, 0xf8, 0x20, 0x40,         /* ldr  r4, STM32_FLASH_BASE */
+                                                                       /* write_half_word: */
+               0x01, 0x23,                                     /* movs r3, #0x01 */
+               0x23, 0x61,                                     /* str  r3, [r4, #STM32_FLASH_CR_OFFSET] */
+               0x30, 0xf8, 0x02, 0x3b,         /* ldrh r3, [r0], #0x02 */
+               0x21, 0xf8, 0x02, 0x3b,         /* strh r3, [r1], #0x02 */
                                                                        /* busy: */
-               0x2B, 0x68,                                     /* ldr  r3, [r5, #0] */
-               0x13, 0xF0, 0x01, 0x0F,         /* tst  r3, #0x01 */
-               0xFB, 0xD0,                                     /* beq  busy */
-               0x13, 0xF0, 0x14, 0x0F,         /* tst  r3, #0x14 */
-               0x01, 0xD1,                                     /* bne  exit */
-               0x01, 0x3A,                                     /* subs r2, r2, #1 */
-               0xED, 0xD1,                                     /* bne  write */
+               0xe3, 0x68,                                     /* ldr  r3, [r4, #STM32_FLASH_SR_OFFSET] */
+               0x13, 0xf0, 0x01, 0x0f,         /* tst  r3, #0x01 */
+               0xfb, 0xd0,                                     /* beq  busy */
+               0x13, 0xf0, 0x14, 0x0f,         /* tst  r3, #0x14 */
+               0x01, 0xd1,                                     /* bne  exit */
+               0x01, 0x3a,                                     /* subs r2, r2, #0x01 */
+               0xf0, 0xd1,                                     /* bne  write_half_word */
                                                                        /* exit: */
-               0x00, 0xBE,                             /* bkpt #0 */
-               0x10, 0x20, 0x02, 0x40,         /* STM32_FLASH_CR:      .word 0x40022010 */
-               0x0C, 0x20, 0x02, 0x40          /* STM32_FLASH_SR:      .word 0x4002200C */
+               0x00, 0xbe,                                     /* bkpt #0x00 */
+               0x00, 0x20, 0x02, 0x40,         /* STM32_FLASH_BASE: .word 0x40022000 */
        };
 
        /* flash write code */