#define KEY1 0x45670123
#define KEY2 0xCDEF89AB
+/* timeout values */
+
+#define FLASH_WRITE_TIMEOUT 10
+#define FLASH_ERASE_TIMEOUT 100
+
struct stm32x_options {
uint16_t RDP;
uint16_t user_options;
+ uint16_t user_data;
uint16_t protection[4];
};
struct stm32x_flash_bank {
struct stm32x_options option_bytes;
- struct working_area *write_algorithm;
int ppage_size;
int probed;
bool has_dual_banks;
/* used to access dual flash bank stm32xl */
uint32_t register_base;
+ uint16_t default_rdp;
+ int user_data_offset;
+ int option_offset;
};
static int stm32x_mass_erase(struct flash_bank *bank);
static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id);
+static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count);
/* flash bank stm32x <base> <size> 0 0 <target#>
*/
stm32x_info = malloc(sizeof(struct stm32x_flash_bank));
bank->driver_priv = stm32x_info;
- stm32x_info->write_algorithm = NULL;
stm32x_info->probed = 0;
stm32x_info->has_dual_banks = false;
stm32x_info->register_base = FLASH_REG_BASE_B0;
return retval;
}
-int stm32x_check_operation_supported(struct flash_bank *bank)
+static int stm32x_check_operation_supported(struct flash_bank *bank)
{
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
if (retval != ERROR_OK)
return retval;
- stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8 | ((optiondata >> 2) & 0x07);
+ stm32x_info->option_bytes.user_options = (optiondata >> stm32x_info->option_offset >> 2) & 0xffff;
+ stm32x_info->option_bytes.user_data = (optiondata >> stm32x_info->user_data_offset) & 0xffff;
stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
if (optiondata & (1 << OPT_READOUT))
if (retval != ERROR_OK)
return retval;
- retval = stm32x_wait_status_busy(bank, 10);
+ retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
if (retval != ERROR_OK)
return retval;
/* clear readout protection and complementary option bytes
* this will also force a device unlock if set */
- stm32x_info->option_bytes.RDP = 0x5AA5;
+ stm32x_info->option_bytes.RDP = stm32x_info->default_rdp;
return ERROR_OK;
}
if (retval != ERROR_OK)
return retval;
- /* write user option byte */
- retval = target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write protection byte 1 */
- retval = target_write_u16(target, STM32_OB_WRP0, stm32x_info->option_bytes.protection[0]);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write protection byte 2 */
- retval = target_write_u16(target, STM32_OB_WRP1, stm32x_info->option_bytes.protection[1]);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write protection byte 3 */
- retval = target_write_u16(target, STM32_OB_WRP2, stm32x_info->option_bytes.protection[2]);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write protection byte 4 */
- retval = target_write_u16(target, STM32_OB_WRP3, stm32x_info->option_bytes.protection[3]);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write readout protection bit */
- retval = target_write_u16(target, STM32_OB_RDP, stm32x_info->option_bytes.RDP);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
+ uint8_t opt_bytes[16];
+
+ target_buffer_set_u16(target, opt_bytes, stm32x_info->option_bytes.RDP);
+ target_buffer_set_u16(target, opt_bytes + 2, stm32x_info->option_bytes.user_options);
+ target_buffer_set_u16(target, opt_bytes + 4, stm32x_info->option_bytes.user_data & 0xff);
+ target_buffer_set_u16(target, opt_bytes + 6, (stm32x_info->option_bytes.user_data >> 8) & 0xff);
+ target_buffer_set_u16(target, opt_bytes + 8, stm32x_info->option_bytes.protection[0]);
+ target_buffer_set_u16(target, opt_bytes + 10, stm32x_info->option_bytes.protection[1]);
+ target_buffer_set_u16(target, opt_bytes + 12, stm32x_info->option_bytes.protection[2]);
+ target_buffer_set_u16(target, opt_bytes + 14, stm32x_info->option_bytes.protection[3]);
+
+ uint32_t offset = STM32_OB_RDP - bank->base;
+ retval = stm32x_write_block(bank, opt_bytes, offset, sizeof(opt_bytes) / 2);
+ if (retval != ERROR_OK) {
+ if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
+ LOG_ERROR("working area required to erase options bytes");
return retval;
+ }
retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_LOCK);
if (retval != ERROR_OK)
if (retval != ERROR_OK)
return retval;
- retval = stm32x_wait_status_busy(bank, 100);
+ retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
if (retval != ERROR_OK)
return retval;
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
struct target *target = bank->target;
uint32_t buffer_size = 16384;
+ struct working_area *write_algorithm;
struct working_area *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[5];
/* flash write code */
if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code),
- &stm32x_info->write_algorithm) != ERROR_OK) {
+ &write_algorithm) != ERROR_OK) {
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- retval = target_write_buffer(target, stm32x_info->write_algorithm->address,
+ retval = target_write_buffer(target, write_algorithm->address,
sizeof(stm32x_flash_write_code), (uint8_t *)stm32x_flash_write_code);
if (retval != ERROR_OK)
return retval;
buffer_size /= 2;
buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
if (buffer_size <= 256) {
- /* if we already allocated the writing code, but failed to get a
+ /* we already allocated the writing code, but failed to get a
* buffer, free the algorithm */
- if (stm32x_info->write_algorithm)
- target_free_working_area(target, stm32x_info->write_algorithm);
+ target_free_working_area(target, write_algorithm);
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
buf_set_u32(reg_params[4].value, 0, 32, address);
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARMV7M_MODE_ANY;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
retval = target_run_flash_async_algorithm(target, buffer, count, 2,
0, NULL,
5, reg_params,
source->address, source->size,
- stm32x_info->write_algorithm->address, 0,
+ write_algorithm->address, 0,
&armv7m_info);
if (retval == ERROR_FLASH_OPERATION_FAILED) {
}
target_free_working_area(target, source);
- target_free_working_area(target, stm32x_info->write_algorithm);
+ target_free_working_area(target, write_algorithm);
destroy_reg_param(®_params[0]);
destroy_reg_param(®_params[1]);
stm32x_info->probed = 0;
stm32x_info->register_base = FLASH_REG_BASE_B0;
+ stm32x_info->user_data_offset = 10;
+ stm32x_info->option_offset = 0;
+
+ /* default factory protection level */
+ stm32x_info->default_rdp = 0x5AA5;
/* read stm32 device id register */
int retval = stm32x_get_device_id(bank, &device_id);
page_size = 2048;
stm32x_info->ppage_size = 2;
max_flash_size_in_kb = 256;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0x55AA;
break;
case 0x428: /* value line High density */
page_size = 2048;
page_size = 2048;
stm32x_info->ppage_size = 2;
max_flash_size_in_kb = 256;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0x55AA;
break;
case 0x440: /* stm32f0x */
page_size = 1024;
stm32x_info->ppage_size = 4;
max_flash_size_in_kb = 64;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0x55AA;
break;
default:
LOG_WARNING("Cannot identify target as a STM32 family.");
}
}
+ /* if the user sets the size manually then ignore the probed value
+ * this allows us to work around devices that have a invalid flash size register value */
+ if (bank->size) {
+ LOG_INFO("ignoring flash probed value, using configured bank size");
+ flash_size_in_kb = bank->size / 1024;
+ }
+
LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
/* did we assign flash size? */
switch (device_id >> 16) {
case 0x1000:
- snprintf(buf, buf_size, "1.0");
+ snprintf(buf, buf_size, "A");
+ break;
+
+ case 0x1001:
+ snprintf(buf, buf_size, "Z");
+ break;
+
+ case 0x2000:
+ snprintf(buf, buf_size, "B");
break;
default:
switch (device_id >> 16) {
case 0x1000:
- snprintf(buf, buf_size, "1.0");
+ snprintf(buf, buf_size, "A");
+ break;
+
+ case 0x2000:
+ snprintf(buf, buf_size, "B");
break;
default:
return retval;
command_print(CMD_CTX, "Option Byte: 0x%" PRIx32 "", optionbyte);
+ int user_data = optionbyte;
+
if (buf_get_u32((uint8_t *)&optionbyte, OPT_ERROR, 1))
command_print(CMD_CTX, "Option Byte Complement Error");
else
command_print(CMD_CTX, "Readout Protection Off");
+ /* user option bytes are offset depending on variant */
+ optionbyte >>= stm32x_info->option_offset;
+
if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDWDGSW, 1))
command_print(CMD_CTX, "Software Watchdog");
else
command_print(CMD_CTX, "Boot: Bank 1");
}
+ command_print(CMD_CTX, "User Option0: 0x%02" PRIx8,
+ (user_data >> stm32x_info->user_data_offset) & 0xff);
+ command_print(CMD_CTX, "User Option1: 0x%02" PRIx8,
+ (user_data >> (stm32x_info->user_data_offset + 8)) & 0xff);
+
return ERROR_OK;
}
{
struct target *target = NULL;
struct stm32x_flash_bank *stm32x_info = NULL;
- uint16_t optionbyte = 0xF8;
+ uint16_t optionbyte;
- if (CMD_ARGC < 4)
+ if (CMD_ARGC < 2)
return ERROR_COMMAND_SYNTAX_ERROR;
struct flash_bank *bank;
if (ERROR_OK != retval)
return retval;
- /* REVISIT: ignores some options which we will display...
- * and doesn't insist on the specified syntax.
- */
-
- /* OPT_RDWDGSW */
- if (strcmp(CMD_ARGV[1], "SWWDG") == 0)
- optionbyte |= (1 << 0);
- else /* REVISIT must be "HWWDG" then ... */
- optionbyte &= ~(1 << 0);
-
- /* OPT_RDRSTSTOP */
- if (strcmp(CMD_ARGV[2], "NORSTSTOP") == 0)
- optionbyte |= (1 << 1);
- else /* REVISIT must be "RSTSTNDBY" then ... */
- optionbyte &= ~(1 << 1);
-
- /* OPT_RDRSTSTDBY */
- if (strcmp(CMD_ARGV[3], "NORSTSTNDBY") == 0)
- optionbyte |= (1 << 2);
- else /* REVISIT must be "RSTSTOP" then ... */
- optionbyte &= ~(1 << 2);
-
- if (CMD_ARGC > 4 && stm32x_info->has_dual_banks) {
- /* OPT_BFB2 */
- if (strcmp(CMD_ARGV[4], "BOOT0") == 0)
- optionbyte |= (1 << 3);
- else
- optionbyte &= ~(1 << 3);
+ retval = stm32x_read_options(bank);
+ if (ERROR_OK != retval)
+ return retval;
+
+ /* start with current options */
+ optionbyte = stm32x_info->option_bytes.user_options;
+
+ /* skip over flash bank */
+ CMD_ARGC--;
+ CMD_ARGV++;
+
+ while (CMD_ARGC) {
+ if (strcmp("SWWDG", CMD_ARGV[0]) == 0)
+ optionbyte |= (1 << 0);
+ else if (strcmp("HWWDG", CMD_ARGV[0]) == 0)
+ optionbyte &= ~(1 << 0);
+ else if (strcmp("NORSTSTOP", CMD_ARGV[0]) == 0)
+ optionbyte &= ~(1 << 1);
+ else if (strcmp("RSTSTNDBY", CMD_ARGV[0]) == 0)
+ optionbyte &= ~(1 << 1);
+ else if (strcmp("NORSTSTNDBY", CMD_ARGV[0]) == 0)
+ optionbyte &= ~(1 << 2);
+ else if (strcmp("RSTSTOP", CMD_ARGV[0]) == 0)
+ optionbyte &= ~(1 << 2);
+ else if (stm32x_info->has_dual_banks) {
+ if (strcmp("BOOT0", CMD_ARGV[0]) == 0)
+ optionbyte |= (1 << 3);
+ else if (strcmp("BOOT1", CMD_ARGV[0]) == 0)
+ optionbyte &= ~(1 << 3);
+ else
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ } else
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ CMD_ARGC--;
+ CMD_ARGV++;
}
if (stm32x_erase_options(bank) != ERROR_OK) {
if (retval != ERROR_OK)
return retval;
- retval = stm32x_wait_status_busy(bank, 100);
+ retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
if (retval != ERROR_OK)
return retval;
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