* Copyright (C) 2013 Nemui Trinomius *
* nemuisan_kawausogasuki@live.jp *
* *
+ * Copyright (C) 2015 Tomas Vanek *
+ * vanekt@fbl.cz *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
#include "jtag/interface.h"
#include "imp.h"
#include <helper/binarybuffer.h>
+#include <target/target_type.h>
#include <target/algorithm.h>
#include <target/armv7m.h>
#include <target/cortex_m.h>
* variants also have FlexNVM and FlexRAM, which always appear
* together.
*
- * A given Kinetis chip may have 2 or 4 blocks of flash. Here we map
+ * A given Kinetis chip may have 1, 2 or 4 blocks of flash. Here we map
* each block to a separate bank. Each block size varies by chip and
* may be determined by the read-only SIM_FCFG1 register. The sector
- * size within each bank/block varies by the chip granularity as
- * described below.
- *
- * Kinetis offers four different of flash granularities applicable
- * across the chip families. The granularity is apparently reflected
- * by at least the reference manual suffix. For example, for chip
- * MK60FN1M0VLQ12, reference manual K60P144M150SF3RM ends in "SF3RM",
- * where the "3" indicates there are four flash blocks with 4kiB
- * sectors. All possible granularities are indicated below.
+ * size within each bank/block varies by chip, and may be 1, 2 or 4k.
+ * The sector size may be different for flash and FlexNVM.
*
- * The first half of the flash (1 or 2 blocks, depending on the
- * granularity) is always Program Flash and always starts at address
- * 0x00000000. The "PFLSH" flag, bit 23 of the read-only SIM_FCFG2
- * register, determines whether the second half of the flash is also
- * Program Flash or FlexNVM+FlexRAM. When PFLSH is set, the second
- * half of flash is Program Flash and is contiguous in the memory map
- * from the first half. When PFLSH is clear, the second half of flash
- * is FlexNVM and always starts at address 0x10000000. FlexRAM, which
- * is also present when PFLSH is clear, always starts at address
- * 0x14000000.
+ * The first half of the flash (1 or 2 blocks) is always Program Flash
+ * and always starts at address 0x00000000. The "PFLSH" flag, bit 23
+ * of the read-only SIM_FCFG2 register, determines whether the second
+ * half of the flash is also Program Flash or FlexNVM+FlexRAM. When
+ * PFLSH is set, the second from the first half. When PFLSH is clear,
+ * the second half of flash is FlexNVM and always starts at address
+ * 0x10000000. FlexRAM, which is also present when PFLSH is clear,
+ * always starts at address 0x14000000.
*
* The Flash Memory Module provides a register set where flash
* commands are loaded to perform flash operations like erase and
* program. Different commands are available depending on whether
* Program Flash or FlexNVM/FlexRAM is being manipulated. Although
* the commands used are quite consistent between flash blocks, the
- * parameters they accept differ according to the flash granularity.
- * Some Kinetis chips have different granularity between Program Flash
- * and FlexNVM/FlexRAM, so flash command arguments may differ between
- * blocks in the same chip.
+ * parameters they accept differ according to the flash sector size.
*
*/
-static const struct {
- unsigned pflash_sector_size_bytes;
- unsigned nvm_sector_size_bytes;
- unsigned num_blocks;
-} kinetis_flash_params[4] = {
- { 1<<10, 1<<10, 2 },
- { 2<<10, 1<<10, 2 },
- { 2<<10, 2<<10, 2 },
- { 4<<10, 4<<10, 4 }
-};
-
/* Addressess */
#define FLEXRAM 0x14000000
+
+#define FMC_PFB01CR 0x4001f004
#define FTFx_FSTAT 0x40020000
#define FTFx_FCNFG 0x40020001
#define FTFx_FCCOB3 0x40020004
#define FTFx_FPROT3 0x40020010
+#define FTFx_FDPROT 0x40020017
#define SIM_SDID 0x40048024
+#define SIM_SOPT1 0x40047000
#define SIM_FCFG1 0x4004804c
#define SIM_FCFG2 0x40048050
+#define WDOG_STCTRH 0x40052000
/* Commands */
#define FTFx_CMD_BLOCKSTAT 0x00
#define FTFx_CMD_LWORDPROG 0x06
#define FTFx_CMD_SECTERASE 0x09
#define FTFx_CMD_SECTWRITE 0x0b
-#define FTFx_CMD_SETFLEXRAM 0x81
#define FTFx_CMD_MASSERASE 0x44
+#define FTFx_CMD_PGMPART 0x80
+#define FTFx_CMD_SETFLEXRAM 0x81
-/* The Kinetis K series uses the following SDID layout :
+/* The older Kinetis K series uses the following SDID layout :
* Bit 31-16 : 0
* Bit 15-12 : REVID
* Bit 11-7 : DIEID
* Bit 6-4 : FAMID
* Bit 3-0 : PINID
*
- * The Kinetis KL series uses the following SDID layout :
+ * The newer Kinetis series uses the following SDID layout :
* Bit 31-28 : FAMID
* Bit 27-24 : SUBFAMID
* Bit 23-20 : SERIESID
* Bit 6-4 : Reserved (0)
* Bit 3-0 : PINID
*
- * SERIESID should be 1 for the KL-series so we assume that if
- * bits 31-16 are 0 then it's a K-series MCU.
+ * We assume that if bits 31-16 are 0 then it's an older
+ * K-series MCU.
*/
+#define KINETIS_SOPT1_RAMSIZE_MASK 0x0000F000
+#define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
+
#define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
#define KINETIS_SDID_DIEID_MASK 0x00000F80
-#define KINETIS_SDID_DIEID_K_A 0x00000100
-#define KINETIS_SDID_DIEID_K_B 0x00000200
-#define KINETIS_SDID_DIEID_KL 0x00000000
+
+#define KINETIS_SDID_DIEID_K22FN128 0x00000680 /* smaller pflash with FTFA */
+#define KINETIS_SDID_DIEID_K22FN256 0x00000A80
+#define KINETIS_SDID_DIEID_K22FN512 0x00000E80
+#define KINETIS_SDID_DIEID_K24FN256 0x00000700
+
+#define KINETIS_SDID_DIEID_K24FN1M 0x00000300 /* Detect Errata 7534 */
/* We can't rely solely on the FAMID field to determine the MCU
* type since some FAMID values identify multiple MCUs with
#define KINETIS_K_SDID_K60_M150 0x000001C0
#define KINETIS_K_SDID_K70_M150 0x000001D0
-#define KINETIS_KL_SDID_SERIESID_MASK 0x00F00000
-#define KINETIS_KL_SDID_SERIESID_KL 0x00100000
+#define KINETIS_SDID_SERIESID_MASK 0x00F00000
+#define KINETIS_SDID_SERIESID_K 0x00000000
+#define KINETIS_SDID_SERIESID_KL 0x00100000
+#define KINETIS_SDID_SERIESID_KW 0x00500000
+#define KINETIS_SDID_SERIESID_KV 0x00600000
+
+#define KINETIS_SDID_SUBFAMID_MASK 0x0F000000
+#define KINETIS_SDID_SUBFAMID_KX0 0x00000000
+#define KINETIS_SDID_SUBFAMID_KX1 0x01000000
+#define KINETIS_SDID_SUBFAMID_KX2 0x02000000
+#define KINETIS_SDID_SUBFAMID_KX3 0x03000000
+#define KINETIS_SDID_SUBFAMID_KX4 0x04000000
+#define KINETIS_SDID_SUBFAMID_KX5 0x05000000
+#define KINETIS_SDID_SUBFAMID_KX6 0x06000000
+
+#define KINETIS_SDID_FAMILYID_MASK 0xF0000000
+#define KINETIS_SDID_FAMILYID_K0X 0x00000000
+#define KINETIS_SDID_FAMILYID_K1X 0x10000000
+#define KINETIS_SDID_FAMILYID_K2X 0x20000000
+#define KINETIS_SDID_FAMILYID_K3X 0x30000000
+#define KINETIS_SDID_FAMILYID_K4X 0x40000000
+#define KINETIS_SDID_FAMILYID_K6X 0x60000000
+#define KINETIS_SDID_FAMILYID_K7X 0x70000000
struct kinetis_flash_bank {
- unsigned granularity;
- unsigned bank_ordinal;
+ bool probed;
uint32_t sector_size;
+ uint32_t max_flash_prog_size;
uint32_t protection_size;
- uint32_t klxx;
+ uint32_t prog_base; /* base address for FTFx operations */
+ /* same as bank->base for pflash, differs for FlexNVM */
+ uint32_t protection_block; /* number of first protection block in this bank */
uint32_t sim_sdid;
uint32_t sim_fcfg1;
FC_FLEX_NVM,
FC_FLEX_RAM,
} flash_class;
-};
-
+ enum {
+ FS_PROGRAM_SECTOR = 1,
+ FS_PROGRAM_LONGWORD = 2,
+ FS_PROGRAM_PHRASE = 4, /* Unsupported */
+ FS_INVALIDATE_CACHE = 8,
+ } flash_support;
+};
#define MDM_REG_STAT 0x00
#define MDM_REG_CTRL 0x04
int retval;
LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
- retval = dap_queue_ap_write(dap, reg, value);
+ retval = dap_queue_ap_write(dap_ap(dap, 1), reg, value);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: failed to queue a write request");
return retval;
static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
{
int retval;
- retval = dap_queue_ap_read(dap, reg, result);
+
+ retval = dap_queue_ap_read(dap_ap(dap, 1), reg, result);
if (retval != ERROR_OK) {
LOG_DEBUG("MDM: failed to queue a read request");
return retval;
}
int retval;
- const uint8_t original_ap = dap->ap_current;
/*
* ... Power on the processor, or if power has already been
LOG_WARNING("Attempting mass erase without hardware reset. This is not reliable; "
"it's recommended you connect SRST and use ``reset_config srst_only''.");
- dap_ap_select(dap, 1);
-
retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, MEM_CTRL_SYS_RES_REQ);
if (retval != ERROR_OK)
return retval;
if (retval != ERROR_OK)
return retval;
- if (jtag_get_reset_config() & RESET_HAS_SRST)
- adapter_deassert_reset();
+ if (jtag_get_reset_config() & RESET_HAS_SRST) {
+ /* halt MCU otherwise it loops in hard fault - WDOG reset cycle */
+ target->reset_halt = true;
+ target->type->assert_reset(target);
+ target->type->deassert_reset(target);
+ }
- dap_ap_select(dap, original_ap);
return ERROR_OK;
}
uint32_t val;
int retval;
- const uint8_t origninal_ap = dap->ap_current;
-
- dap_ap_select(dap, 1);
-
/*
* ... The MDM-AP ID register can be read to verify that the
goto fail;
}
+ if ((val & (MDM_STAT_SYSSEC | MDM_STAT_CORE_HALTED)) == MDM_STAT_SYSSEC) {
+ LOG_WARNING("MDM: Secured MCU state detected however it may be a false alarm");
+ LOG_WARNING("MDM: Halting target to detect secured state reliably");
+
+ retval = target_halt(target);
+ if (retval == ERROR_OK)
+ retval = target_wait_state(target, TARGET_HALTED, 100);
+
+ if (retval != ERROR_OK) {
+ LOG_WARNING("MDM: Target not halted, trying reset halt");
+ target->reset_halt = true;
+ target->type->assert_reset(target);
+ target->type->deassert_reset(target);
+ }
+
+ /* re-read status */
+ retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("MDM: failed to read MDM_REG_STAT");
+ goto fail;
+ }
+ }
+
if (val & MDM_STAT_SYSSEC) {
jtag_poll_set_enabled(false);
jtag_poll_set_enabled(true);
}
- dap_ap_select(dap, origninal_ap);
-
return ERROR_OK;
fail:
return ERROR_OK;
}
+/* Disable the watchdog on Kinetis devices */
+int kinetis_disable_wdog(struct target *target, uint32_t sim_sdid)
+{
+ struct working_area *wdog_algorithm;
+ struct armv7m_algorithm armv7m_info;
+ uint16_t wdog;
+ int retval;
+
+ static const uint8_t kinetis_unlock_wdog_code[] = {
+ /* WDOG_UNLOCK = 0xC520 */
+ 0x4f, 0xf4, 0x00, 0x53, /* mov.w r3, #8192 ; 0x2000 */
+ 0xc4, 0xf2, 0x05, 0x03, /* movt r3, #16389 ; 0x4005 */
+ 0x4c, 0xf2, 0x20, 0x52, /* movw r2, #50464 ; 0xc520 */
+ 0xda, 0x81, /* strh r2, [r3, #14] */
+
+ /* WDOG_UNLOCK = 0xD928 */
+ 0x4f, 0xf4, 0x00, 0x53, /* mov.w r3, #8192 ; 0x2000 */
+ 0xc4, 0xf2, 0x05, 0x03, /* movt r3, #16389 ; 0x4005 */
+ 0x4d, 0xf6, 0x28, 0x12, /* movw r2, #55592 ; 0xd928 */
+ 0xda, 0x81, /* strh r2, [r3, #14] */
+
+ /* WDOG_SCR = 0x1d2 */
+ 0x4f, 0xf4, 0x00, 0x53, /* mov.w r3, #8192 ; 0x2000 */
+ 0xc4, 0xf2, 0x05, 0x03, /* movt r3, #16389 ; 0x4005 */
+ 0x4f, 0xf4, 0xe9, 0x72, /* mov.w r2, #466 ; 0x1d2 */
+ 0x1a, 0x80, /* strh r2, [r3, #0] */
+
+ /* END */
+ 0x00, 0xBE, /* bkpt #0 */
+ };
+
+ /* Decide whether the connected device needs watchdog disabling.
+ * Disable for all Kx devices, i.e., return if it is a KLx */
+
+ if ((sim_sdid & KINETIS_SDID_SERIESID_MASK) == KINETIS_SDID_SERIESID_KL)
+ return ERROR_OK;
+
+ /* The connected device requires watchdog disabling. */
+ retval = target_read_u16(target, WDOG_STCTRH, &wdog);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if ((wdog & 0x1) == 0) {
+ /* watchdog already disabled */
+ return ERROR_OK;
+ }
+ LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%x)", wdog);
+
+ if (target->state != TARGET_HALTED) {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
+ retval = target_alloc_working_area(target, sizeof(kinetis_unlock_wdog_code), &wdog_algorithm);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = target_write_buffer(target, wdog_algorithm->address,
+ sizeof(kinetis_unlock_wdog_code), (uint8_t *)kinetis_unlock_wdog_code);
+ if (retval != ERROR_OK) {
+ target_free_working_area(target, wdog_algorithm);
+ return retval;
+ }
+
+ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
+
+ retval = target_run_algorithm(target, 0, NULL, 0, NULL, wdog_algorithm->address,
+ wdog_algorithm->address + (sizeof(kinetis_unlock_wdog_code) - 2),
+ 10000, &armv7m_info);
+
+ if (retval != ERROR_OK)
+ LOG_ERROR("error executing kinetis wdog unlock algorithm");
+
+ retval = target_read_u16(target, WDOG_STCTRH, &wdog);
+ if (retval != ERROR_OK)
+ return retval;
+ LOG_INFO("WDOG_STCTRLH = 0x%x", wdog);
+
+ target_free_working_area(target, wdog_algorithm);
+
+ return retval;
+}
+
+COMMAND_HANDLER(kinetis_disable_wdog_handler)
+{
+ int result;
+ uint32_t sim_sdid;
+ struct target *target = get_current_target(CMD_CTX);
+
+ if (CMD_ARGC > 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ result = target_read_u32(target, SIM_SDID, &sim_sdid);
+ if (result != ERROR_OK) {
+ LOG_ERROR("Failed to read SIMSDID");
+ return result;
+ }
+
+ result = kinetis_disable_wdog(target, sim_sdid);
+ return result;
+}
+
+
/* Kinetis Program-LongWord Microcodes */
static const uint8_t kinetis_flash_write_code[] = {
/* Params:
uint32_t buffer_size = 2048; /* Default minimum value */
struct working_area *write_algorithm;
struct working_area *source;
- uint32_t address = bank->base + offset;
+ struct kinetis_flash_bank *kinfo = bank->driver_priv;
+ uint32_t address = kinfo->prog_base + offset;
struct reg_param reg_params[3];
struct armv7m_algorithm armv7m_info;
int retval = ERROR_OK;
static int kinetis_protect_check(struct flash_bank *bank)
{
struct kinetis_flash_bank *kinfo = bank->driver_priv;
+ int result;
+ int i, b;
+ uint32_t fprot, psec;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
}
if (kinfo->flash_class == FC_PFLASH) {
- int result;
uint8_t buffer[4];
- uint32_t fprot, psec;
- int i, b;
/* read protection register */
result = target_read_memory(bank->target, FTFx_FPROT3, 1, 4, buffer);
return result;
fprot = target_buffer_get_u32(bank->target, buffer);
+ /* Every bit protects 1/32 of the full flash (not necessarily just this bank) */
- /*
- * Every bit protects 1/32 of the full flash (not necessarily
- * just this bank), but we enforce the bank ordinals for
- * PFlash to start at zero.
- */
- b = kinfo->bank_ordinal * (bank->size / kinfo->protection_size);
- for (psec = 0, i = 0; i < bank->num_sectors; i++) {
- if ((fprot >> b) & 1)
- bank->sectors[i].is_protected = 0;
- else
- bank->sectors[i].is_protected = 1;
+ } else if (kinfo->flash_class == FC_FLEX_NVM) {
+ uint8_t fdprot;
- psec += bank->sectors[i].size;
+ /* read protection register */
+ result = target_read_memory(bank->target, FTFx_FDPROT, 1, 1, &fdprot);
+
+ if (result != ERROR_OK)
+ return result;
+
+ fprot = fdprot;
- if (psec >= kinfo->protection_size) {
- psec = 0;
- b++;
- }
- }
} else {
- LOG_ERROR("Protection checks for FlexNVM not yet supported");
+ LOG_ERROR("Protection checks for FlexRAM not supported");
return ERROR_FLASH_BANK_INVALID;
}
+ b = kinfo->protection_block;
+ for (psec = 0, i = 0; i < bank->num_sectors; i++) {
+ if ((fprot >> b) & 1)
+ bank->sectors[i].is_protected = 0;
+ else
+ bank->sectors[i].is_protected = 1;
+
+ psec += bank->sectors[i].size;
+
+ if (psec >= kinfo->protection_size) {
+ psec = 0;
+ b++;
+ }
+ }
+
return ERROR_OK;
}
-static int kinetis_ftfx_command(struct flash_bank *bank, uint8_t fcmd, uint32_t faddr,
+static int kinetis_ftfx_command(struct target *target, uint8_t fcmd, uint32_t faddr,
uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
uint8_t *ftfx_fstat)
/* wait for done */
for (i = 0; i < 50; i++) {
result =
- target_read_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
+ target_read_memory(target, FTFx_FSTAT, 1, 1, &buffer);
if (result != ERROR_OK)
return result;
/* reset error flags */
buffer = 0x30;
result =
- target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
+ target_write_memory(target, FTFx_FSTAT, 1, 1, &buffer);
if (result != ERROR_OK)
return result;
}
- result = target_write_memory(bank->target, FTFx_FCCOB3, 4, 3, command);
+ result = target_write_memory(target, FTFx_FCCOB3, 4, 3, command);
if (result != ERROR_OK)
return result;
/* start command */
buffer = 0x80;
- result = target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
+ result = target_write_memory(target, FTFx_FSTAT, 1, 1, &buffer);
if (result != ERROR_OK)
return result;
/* wait for done */
for (i = 0; i < 240; i++) { /* Need longtime for "Mass Erase" Command Nemui Changed */
result =
- target_read_memory(bank->target, FTFx_FSTAT, 1, 1, ftfx_fstat);
+ target_read_memory(target, FTFx_FSTAT, 1, 1, ftfx_fstat);
if (result != ERROR_OK)
return result;
return ERROR_OK;
}
-COMMAND_HANDLER(kinetis_securing_test)
-{
- int result;
- uint8_t ftfx_fstat;
- struct target *target = get_current_target(CMD_CTX);
- struct flash_bank *bank = NULL;
-
- result = get_flash_bank_by_addr(target, 0x00000000, true, &bank);
- if (result != ERROR_OK)
- return result;
- assert(bank != NULL);
+static void kinetis_invalidate_flash_cache(struct flash_bank *bank)
+{
+ struct kinetis_flash_bank *kinfo = bank->driver_priv;
+ uint8_t pfb01cr_byte2 = 0xf0;
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
+ if (!(kinfo->flash_support & FS_INVALIDATE_CACHE))
+ return;
- return kinetis_ftfx_command(bank, FTFx_CMD_SECTERASE, bank->base + 0x00000400,
- 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
+ target_write_memory(bank->target, FMC_PFB01CR + 2, 1, 1, &pfb01cr_byte2);
+ return;
}
+
static int kinetis_erase(struct flash_bank *bank, int first, int last)
{
int result, i;
+ struct kinetis_flash_bank *kinfo = bank->driver_priv;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
for (i = first; i <= last; i++) {
uint8_t ftfx_fstat;
/* set command and sector address */
- result = kinetis_ftfx_command(bank, FTFx_CMD_SECTERASE, bank->base + bank->sectors[i].offset,
+ result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTERASE, kinfo->prog_base + bank->sectors[i].offset,
0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
if (result != ERROR_OK) {
bank->sectors[i].is_erased = 1;
}
+ kinetis_invalidate_flash_cache(bank);
+
if (first == 0) {
LOG_WARNING
("flash configuration field erased, please reset the device");
return ERROR_OK;
}
+static int kinetis_make_ram_ready(struct target *target)
+{
+ int result;
+ uint8_t ftfx_fstat;
+ uint8_t ftfx_fcnfg;
+
+ /* check if ram ready */
+ result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg);
+ if (result != ERROR_OK)
+ return result;
+
+ if (ftfx_fcnfg & (1 << 1))
+ return ERROR_OK; /* ram ready */
+
+ /* make flex ram available */
+ result = kinetis_ftfx_command(target, FTFx_CMD_SETFLEXRAM, 0x00ff0000,
+ 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
+ if (result != ERROR_OK)
+ return ERROR_FLASH_OPERATION_FAILED;
+
+ /* check again */
+ result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg);
+ if (result != ERROR_OK)
+ return result;
+
+ if (ftfx_fcnfg & (1 << 1))
+ return ERROR_OK; /* ram ready */
+
+ return ERROR_FLASH_OPERATION_FAILED;
+}
+
static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
unsigned int i, result, fallback = 0;
- uint8_t buf[8];
uint32_t wc;
struct kinetis_flash_bank *kinfo = bank->driver_priv;
uint8_t *new_buffer = NULL;
return ERROR_TARGET_NOT_HALTED;
}
- if (kinfo->klxx) {
+ if (!(kinfo->flash_support & FS_PROGRAM_SECTOR)) {
/* fallback to longword write */
fallback = 1;
- LOG_WARNING("Kinetis L Series supports Program Longword execution only.");
- LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
-
- } else if (kinfo->flash_class == FC_FLEX_NVM) {
- uint8_t ftfx_fstat;
-
- LOG_DEBUG("flash write into FlexNVM @%08" PRIX32, offset);
-
- /* make flex ram available */
- result = kinetis_ftfx_command(bank, FTFx_CMD_SETFLEXRAM, 0x00ff0000, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
-
- if (result != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* check if ram ready */
- result = target_read_memory(bank->target, FTFx_FCNFG, 1, 1, buf);
-
- if (result != ERROR_OK)
- return result;
-
- if (!(buf[0] & (1 << 1))) {
- /* fallback to longword write */
+ LOG_WARNING("This device supports Program Longword execution only.");
+ } else {
+ result = kinetis_make_ram_ready(bank->target);
+ if (result != ERROR_OK) {
fallback = 1;
-
- LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)", buf[0]);
+ LOG_WARNING("FlexRAM not ready, fallback to slow longword write.");
}
- } else {
- LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
}
+ LOG_DEBUG("flash write @08%" PRIX32, offset);
+
/* program section command */
if (fallback == 0) {
* Kinetis "chunk" is 16 bytes (128 bits).
*/
unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
- /* assume the NVM sector size is half the FlexRAM size */
- unsigned prog_size_bytes = MIN(kinfo->sector_size,
- kinetis_flash_params[kinfo->granularity].nvm_sector_size_bytes);
+ unsigned prog_size_bytes = kinfo->max_flash_prog_size;
for (i = 0; i < count; i += prog_size_bytes) {
uint8_t residual_buffer[16];
uint8_t ftfx_fstat;
unsigned residual_bc = (count-i) % prog_section_chunk_bytes;
/* number of complete words to copy directly from buffer */
- wc = (count - i) / 4;
+ wc = (count - i - residual_bc) / 4;
/* number of total sections to write, including residual */
section_count = DIV_ROUND_UP((count-i), prog_section_chunk_bytes);
}
/* execute section-write command */
- result = kinetis_ftfx_command(bank, FTFx_CMD_SECTWRITE, bank->base + offset + i,
+ result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTWRITE, kinfo->prog_base + offset + i,
section_count>>8, section_count, 0, 0,
0, 0, 0, 0, &ftfx_fstat);
}
}
/* program longword command, not supported in "SF3" devices */
- else if ((kinfo->granularity != 3) || (kinfo->klxx)) {
-
+ else if (kinfo->flash_support & FS_PROGRAM_LONGWORD) {
if (count & 0x3) {
uint32_t old_count = count;
count = (old_count | 3) + 1;
uint32_t words_remaining = count / 4;
+ kinetis_disable_wdog(bank->target, kinfo->sim_sdid);
+
/* try using a block write */
int retval = kinetis_write_block(bank, buffer, offset, words_remaining);
uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
memcpy(padding, buffer + i, MIN(4, count-i));
- result = kinetis_ftfx_command(bank, FTFx_CMD_LWORDPROG, bank->base + offset + i,
+ result = kinetis_ftfx_command(bank->target, FTFx_CMD_LWORDPROG, kinfo->prog_base + offset + i,
padding[3], padding[2], padding[1], padding[0],
0, 0, 0, 0, &ftfx_fstat);
return ERROR_FLASH_OPERATION_FAILED;
}
}
-
} else {
LOG_ERROR("Flash write strategy not implemented");
return ERROR_FLASH_OPERATION_FAILED;
}
+ kinetis_invalidate_flash_cache(bank);
return ERROR_OK;
}
{
int result, i;
uint32_t offset = 0;
- uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg2_pflsh;
- uint32_t nvm_size = 0, pf_size = 0, ee_size = 0;
- unsigned granularity, num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0,
- first_nvm_bank = 0, reassign = 0;
+ uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg1_depart;
+ uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1;
+ uint32_t nvm_size = 0, pf_size = 0, df_size = 0, ee_size = 0;
+ unsigned num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0, first_nvm_bank = 0,
+ pflash_sector_size_bytes = 0, nvm_sector_size_bytes = 0;
struct target *target = bank->target;
struct kinetis_flash_bank *kinfo = bank->driver_priv;
+ kinfo->probed = false;
+
result = target_read_u32(target, SIM_SDID, &kinfo->sim_sdid);
if (result != ERROR_OK)
return result;
- kinfo->klxx = 0;
-
- /* K-series MCU? */
if ((kinfo->sim_sdid & (~KINETIS_SDID_K_SERIES_MASK)) == 0) {
+ /* older K-series MCU */
uint32_t mcu_type = kinfo->sim_sdid & KINETIS_K_SDID_TYPE_MASK;
switch (mcu_type) {
case KINETIS_K_SDID_K10_M50:
case KINETIS_K_SDID_K20_M50:
/* 1kB sectors */
- granularity = 0;
+ pflash_sector_size_bytes = 1<<10;
+ nvm_sector_size_bytes = 1<<10;
+ num_blocks = 2;
+ kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
break;
case KINETIS_K_SDID_K10_M72:
case KINETIS_K_SDID_K20_M72:
case KINETIS_K_SDID_K40_M100:
case KINETIS_K_SDID_K50_M72:
/* 2kB sectors, 1kB FlexNVM sectors */
- granularity = 1;
+ pflash_sector_size_bytes = 2<<10;
+ nvm_sector_size_bytes = 1<<10;
+ num_blocks = 2;
+ kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
+ kinfo->max_flash_prog_size = 1<<10;
break;
case KINETIS_K_SDID_K10_M100:
case KINETIS_K_SDID_K20_M100:
case KINETIS_K_SDID_K53:
case KINETIS_K_SDID_K60_M100:
/* 2kB sectors */
- granularity = 2;
+ pflash_sector_size_bytes = 2<<10;
+ nvm_sector_size_bytes = 2<<10;
+ num_blocks = 2;
+ kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
break;
- case KINETIS_K_SDID_K10_M120:
- case KINETIS_K_SDID_K20_M120:
case KINETIS_K_SDID_K21_M120:
case KINETIS_K_SDID_K22_M120:
+ /* 4kB sectors (MK21FN1M0, MK21FX512, MK22FN1M0, MK22FX512) */
+ pflash_sector_size_bytes = 4<<10;
+ kinfo->max_flash_prog_size = 1<<10;
+ nvm_sector_size_bytes = 4<<10;
+ num_blocks = 2;
+ kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
+ break;
+ case KINETIS_K_SDID_K10_M120:
+ case KINETIS_K_SDID_K20_M120:
case KINETIS_K_SDID_K60_M150:
case KINETIS_K_SDID_K70_M150:
/* 4kB sectors */
- granularity = 3;
+ pflash_sector_size_bytes = 4<<10;
+ nvm_sector_size_bytes = 4<<10;
+ num_blocks = 4;
+ kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
break;
default:
LOG_ERROR("Unsupported K-family FAMID");
- return ERROR_FLASH_OPER_UNSUPPORTED;
}
- }
- /* KL-series? */
- else if ((kinfo->sim_sdid & KINETIS_KL_SDID_SERIESID_MASK) == KINETIS_KL_SDID_SERIESID_KL) {
- kinfo->klxx = 1;
- granularity = 0;
} else {
- LOG_ERROR("MCU is unsupported");
+ /* Newer K-series or KL series MCU */
+ switch (kinfo->sim_sdid & KINETIS_SDID_SERIESID_MASK) {
+ case KINETIS_SDID_SERIESID_K:
+ switch (kinfo->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK)) {
+ case KINETIS_SDID_FAMILYID_K0X | KINETIS_SDID_SUBFAMID_KX2:
+ /* K02FN64, K02FN128: FTFA, 2kB sectors */
+ pflash_sector_size_bytes = 2<<10;
+ num_blocks = 1;
+ kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
+ break;
+
+ case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX2: {
+ /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
+ uint32_t sopt1;
+ result = target_read_u32(target, SIM_SOPT1, &sopt1);
+ if (result != ERROR_OK)
+ return result;
+
+ if (((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN1M) &&
+ ((sopt1 & KINETIS_SOPT1_RAMSIZE_MASK) == KINETIS_SOPT1_RAMSIZE_K24FN1M)) {
+ /* MK24FN1M */
+ pflash_sector_size_bytes = 4<<10;
+ num_blocks = 2;
+ kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
+ kinfo->max_flash_prog_size = 1<<10;
+ break;
+ }
+ if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN128
+ || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN256
+ || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN512) {
+ /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */
+ pflash_sector_size_bytes = 2<<10;
+ /* autodetect 1 or 2 blocks */
+ kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
+ break;
+ }
+ LOG_ERROR("Unsupported Kinetis K22 DIEID");
+ break;
+ }
+ case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX4:
+ pflash_sector_size_bytes = 4<<10;
+ if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN256) {
+ /* K24FN256 - smaller pflash with FTFA */
+ num_blocks = 1;
+ kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
+ break;
+ }
+ /* K24FN1M without errata 7534 */
+ num_blocks = 2;
+ kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
+ kinfo->max_flash_prog_size = 1<<10;
+ break;
+
+ case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX3:
+ case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX1: /* errata 7534 - should be K63 */
+ /* K63FN1M0 */
+ case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX4:
+ case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX2: /* errata 7534 - should be K64 */
+ /* K64FN1M0, K64FX512 */
+ pflash_sector_size_bytes = 4<<10;
+ nvm_sector_size_bytes = 4<<10;
+ kinfo->max_flash_prog_size = 1<<10;
+ num_blocks = 2;
+ kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
+ break;
+
+ case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX6:
+ /* K26FN2M0 */
+ case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX6:
+ /* K66FN2M0, K66FX1M0 */
+ pflash_sector_size_bytes = 4<<10;
+ nvm_sector_size_bytes = 4<<10;
+ kinfo->max_flash_prog_size = 1<<10;
+ num_blocks = 4;
+ kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
+ break;
+ default:
+ LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
+ }
+ break;
+ case KINETIS_SDID_SERIESID_KL:
+ /* KL-series */
+ pflash_sector_size_bytes = 1<<10;
+ nvm_sector_size_bytes = 1<<10;
+ /* autodetect 1 or 2 blocks */
+ kinfo->flash_support = FS_PROGRAM_LONGWORD;
+ break;
+ default:
+ LOG_ERROR("Unsupported K-series");
+ }
+ }
+
+ if (pflash_sector_size_bytes == 0) {
+ LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32, kinfo->sim_sdid);
return ERROR_FLASH_OPER_UNSUPPORTED;
}
result = target_read_u32(target, SIM_FCFG2, &kinfo->sim_fcfg2);
if (result != ERROR_OK)
return result;
- fcfg2_pflsh = (kinfo->sim_fcfg2 >> 23) & 0x01;
LOG_DEBUG("SDID: 0x%08" PRIX32 " FCFG1: 0x%08" PRIX32 " FCFG2: 0x%08" PRIX32, kinfo->sim_sdid,
kinfo->sim_fcfg1, kinfo->sim_fcfg2);
fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
+ fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f);
+
+ fcfg2_pflsh = (uint8_t)((kinfo->sim_fcfg2 >> 23) & 0x01);
+ fcfg2_maxaddr0 = (uint8_t)((kinfo->sim_fcfg2 >> 24) & 0x7f);
+ fcfg2_maxaddr1 = (uint8_t)((kinfo->sim_fcfg2 >> 16) & 0x7f);
+
+ if (num_blocks == 0)
+ num_blocks = fcfg2_maxaddr1 ? 2 : 1;
+ else if (fcfg2_maxaddr1 == 0 && num_blocks >= 2) {
+ num_blocks = 1;
+ LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
+ } else if (fcfg2_maxaddr1 != 0 && num_blocks == 1) {
+ num_blocks = 2;
+ LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2");
+ }
/* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
if (!fcfg2_pflsh) {
switch (fcfg1_nvmsize) {
case 0x03:
+ case 0x05:
case 0x07:
case 0x09:
case 0x0b:
nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
break;
case 0x0f:
- if (granularity == 3)
+ if (pflash_sector_size_bytes >= 4<<10)
nvm_size = 512<<10;
else
+ /* K20_100 */
nvm_size = 256<<10;
break;
default:
ee_size = 0;
break;
}
+
+ switch (fcfg1_depart) {
+ case 0x01:
+ case 0x02:
+ case 0x03:
+ case 0x04:
+ case 0x05:
+ case 0x06:
+ df_size = nvm_size - (4096 << fcfg1_depart);
+ break;
+ case 0x08:
+ df_size = 0;
+ break;
+ case 0x09:
+ case 0x0a:
+ case 0x0b:
+ case 0x0c:
+ case 0x0d:
+ df_size = 4096 << (fcfg1_depart & 0x7);
+ break;
+ default:
+ df_size = nvm_size;
+ break;
+ }
}
switch (fcfg1_pfsize) {
pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
break;
case 0x0f:
- if (granularity == 3)
- pf_size = 1024<<10;
- else if (fcfg2_pflsh)
- pf_size = 512<<10;
+ /* a peculiar case: Freescale states different sizes for 0xf
+ * K02P64M100SFARM 128 KB ... duplicate of code 0x7
+ * K22P121M120SF8RM 256 KB ... duplicate of code 0x9
+ * K22P121M120SF7RM 512 KB ... duplicate of code 0xb
+ * K22P100M120SF5RM 1024 KB ... duplicate of code 0xd
+ * K26P169M180SF5RM 2048 KB ... the only unique value
+ * fcfg2_maxaddr0 seems to be the only clue to pf_size
+ * Checking fcfg2_maxaddr0 later in this routine is pointless then
+ */
+ if (fcfg2_pflsh)
+ pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks;
else
- pf_size = 256<<10;
+ pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks / 2;
+ if (pf_size != 2048<<10)
+ LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", pf_size>>10);
+
break;
default:
pf_size = 0;
LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d",
nvm_size, pf_size, ee_size, fcfg2_pflsh);
- if (kinfo->klxx)
- num_blocks = 1;
- else
- num_blocks = kinetis_flash_params[granularity].num_blocks;
num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
first_nvm_bank = num_pflash_blocks;
LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
num_blocks, num_pflash_blocks, num_nvm_blocks);
- /*
- * If the flash class is already assigned, verify the
- * parameters.
- */
- if (kinfo->flash_class != FC_AUTO) {
- if (kinfo->bank_ordinal != (unsigned) bank->bank_number) {
- LOG_WARNING("Flash ordinal/bank number mismatch");
- reassign = 1;
- } else if (kinfo->granularity != granularity) {
- LOG_WARNING("Flash granularity mismatch");
- reassign = 1;
- } else {
- switch (kinfo->flash_class) {
- case FC_PFLASH:
- if (kinfo->bank_ordinal >= first_nvm_bank) {
- LOG_WARNING("Class mismatch, bank %d is not PFlash", bank->bank_number);
- reassign = 1;
- } else if (bank->size != (pf_size / num_pflash_blocks)) {
- LOG_WARNING("PFlash size mismatch");
- reassign = 1;
- } else if (bank->base !=
- (0x00000000 + bank->size * kinfo->bank_ordinal)) {
- LOG_WARNING("PFlash address range mismatch");
- reassign = 1;
- } else if (kinfo->sector_size !=
- kinetis_flash_params[granularity].pflash_sector_size_bytes) {
- LOG_WARNING("PFlash sector size mismatch");
- reassign = 1;
- } else {
- LOG_DEBUG("PFlash bank %d already configured okay",
- kinfo->bank_ordinal);
- }
- break;
- case FC_FLEX_NVM:
- if ((kinfo->bank_ordinal >= num_blocks) ||
- (kinfo->bank_ordinal < first_nvm_bank)) {
- LOG_WARNING("Class mismatch, bank %d is not FlexNVM", bank->bank_number);
- reassign = 1;
- } else if (bank->size != (nvm_size / num_nvm_blocks)) {
- LOG_WARNING("FlexNVM size mismatch");
- reassign = 1;
- } else if (bank->base !=
- (0x10000000 + bank->size * kinfo->bank_ordinal)) {
- LOG_WARNING("FlexNVM address range mismatch");
- reassign = 1;
- } else if (kinfo->sector_size !=
- kinetis_flash_params[granularity].nvm_sector_size_bytes) {
- LOG_WARNING("FlexNVM sector size mismatch");
- reassign = 1;
- } else {
- LOG_DEBUG("FlexNVM bank %d already configured okay",
- kinfo->bank_ordinal);
- }
- break;
- case FC_FLEX_RAM:
- if (kinfo->bank_ordinal != num_blocks) {
- LOG_WARNING("Class mismatch, bank %d is not FlexRAM", bank->bank_number);
- reassign = 1;
- } else if (bank->size != ee_size) {
- LOG_WARNING("FlexRAM size mismatch");
- reassign = 1;
- } else if (bank->base != FLEXRAM) {
- LOG_WARNING("FlexRAM address mismatch");
- reassign = 1;
- } else if (kinfo->sector_size !=
- kinetis_flash_params[granularity].nvm_sector_size_bytes) {
- LOG_WARNING("FlexRAM sector size mismatch");
- reassign = 1;
- } else {
- LOG_DEBUG("FlexRAM bank %d already configured okay", kinfo->bank_ordinal);
- }
- break;
-
- default:
- LOG_WARNING("Unknown or inconsistent flash class");
- reassign = 1;
- break;
- }
- }
- } else {
- LOG_INFO("Probing flash info for bank %d", bank->bank_number);
- reassign = 1;
- }
-
- if (!reassign)
- return ERROR_OK;
-
- kinfo->granularity = granularity;
+ LOG_INFO("Probing flash info for bank %d", bank->bank_number);
if ((unsigned)bank->bank_number < num_pflash_blocks) {
/* pflash, banks start at address zero */
kinfo->flash_class = FC_PFLASH;
bank->size = (pf_size / num_pflash_blocks);
bank->base = 0x00000000 + bank->size * bank->bank_number;
- kinfo->sector_size = kinetis_flash_params[granularity].pflash_sector_size_bytes;
+ kinfo->prog_base = bank->base;
+ kinfo->sector_size = pflash_sector_size_bytes;
kinfo->protection_size = pf_size / 32;
+ kinfo->protection_block = (32 / num_pflash_blocks) * bank->bank_number;
+
} else if ((unsigned)bank->bank_number < num_blocks) {
/* nvm, banks start at address 0x10000000 */
+ unsigned nvm_ord = bank->bank_number - first_nvm_bank;
+ uint32_t limit;
+
kinfo->flash_class = FC_FLEX_NVM;
bank->size = (nvm_size / num_nvm_blocks);
- bank->base = 0x10000000 + bank->size * (bank->bank_number - first_nvm_bank);
- kinfo->sector_size = kinetis_flash_params[granularity].nvm_sector_size_bytes;
- kinfo->protection_size = 0; /* FIXME: TODO: depends on DEPART bits, chip */
+ bank->base = 0x10000000 + bank->size * nvm_ord;
+ kinfo->prog_base = 0x00800000 + bank->size * nvm_ord;
+ kinfo->sector_size = nvm_sector_size_bytes;
+ if (df_size == 0) {
+ kinfo->protection_size = 0;
+ } else {
+ for (i = df_size; ~i & 1; i >>= 1)
+ ;
+ if (i == 1)
+ kinfo->protection_size = df_size / 8; /* data flash size = 2^^n */
+ else
+ kinfo->protection_size = nvm_size / 8; /* TODO: verify on SF1, not documented in RM */
+ }
+ kinfo->protection_block = (8 / num_nvm_blocks) * nvm_ord;
+
+ /* EEPROM backup part of FlexNVM is not accessible, use df_size as a limit */
+ if (df_size > bank->size * nvm_ord)
+ limit = df_size - bank->size * nvm_ord;
+ else
+ limit = 0;
+
+ if (bank->size > limit) {
+ bank->size = limit;
+ LOG_DEBUG("FlexNVM bank %d limited to 0x%08" PRIx32 " due to active EEPROM backup",
+ bank->bank_number, limit);
+ }
+
} else if ((unsigned)bank->bank_number == num_blocks) {
LOG_ERROR("FlexRAM support not yet implemented");
return ERROR_FLASH_OPER_UNSUPPORTED;
return ERROR_FLASH_BANK_INVALID;
}
+ if (bank->bank_number == 0 && ((uint32_t)fcfg2_maxaddr0 << 13) != bank->size)
+ LOG_WARNING("MAXADDR0 0x%02" PRIx8 " check failed,"
+ " please report to OpenOCD mailing list", fcfg2_maxaddr0);
+ if (fcfg2_pflsh) {
+ if (bank->bank_number == 1 && ((uint32_t)fcfg2_maxaddr1 << 13) != bank->size)
+ LOG_WARNING("MAXADDR1 0x%02" PRIx8 " check failed,"
+ " please report to OpenOCD mailing list", fcfg2_maxaddr1);
+ } else {
+ if ((unsigned)bank->bank_number == first_nvm_bank
+ && ((uint32_t)fcfg2_maxaddr1 << 13) != df_size)
+ LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8 " check failed,"
+ " please report to OpenOCD mailing list", fcfg2_maxaddr1);
+ }
+
if (bank->sectors) {
free(bank->sectors);
bank->sectors = NULL;
}
+ if (kinfo->sector_size == 0) {
+ LOG_ERROR("Unknown sector size for bank %d", bank->bank_number);
+ return ERROR_FLASH_BANK_INVALID;
+ }
+
+ if (kinfo->flash_support & FS_PROGRAM_SECTOR
+ && kinfo->max_flash_prog_size == 0) {
+ kinfo->max_flash_prog_size = kinfo->sector_size;
+ /* Program section size is equal to sector size by default */
+ }
+
bank->num_sectors = bank->size / kinfo->sector_size;
- assert(bank->num_sectors > 0);
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = kinfo->sector_size;
- offset += kinfo->sector_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
+
+ if (bank->num_sectors > 0) {
+ /* FlexNVM bank can be used for EEPROM backup therefore zero sized */
+ bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
+
+ for (i = 0; i < bank->num_sectors; i++) {
+ bank->sectors[i].offset = offset;
+ bank->sectors[i].size = kinfo->sector_size;
+ offset += kinfo->sector_size;
+ bank->sectors[i].is_erased = -1;
+ bank->sectors[i].is_protected = 1;
+ }
}
+ kinfo->probed = true;
+
return ERROR_OK;
}
{
struct kinetis_flash_bank *kinfo = bank->driver_priv;
- if (kinfo->sim_sdid)
+ if (kinfo && kinfo->probed)
return ERROR_OK;
return kinetis_probe(bank);
return ERROR_TARGET_NOT_HALTED;
}
- if (kinfo->flash_class == FC_PFLASH) {
+ if (kinfo->flash_class == FC_PFLASH || kinfo->flash_class == FC_FLEX_NVM) {
int result;
+ bool block_dirty = false;
uint8_t ftfx_fstat;
- /* check if whole bank is blank */
- result = kinetis_ftfx_command(bank, FTFx_CMD_BLOCKSTAT, bank->base, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
+ if (kinfo->flash_class == FC_FLEX_NVM) {
+ uint8_t fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f);
+ /* block operation cannot be used on FlexNVM when EEPROM backup partition is set */
+ if (fcfg1_depart != 0xf && fcfg1_depart != 0)
+ block_dirty = true;
+ }
- if (result != ERROR_OK)
- return result;
+ if (!block_dirty) {
+ /* check if whole bank is blank */
+ result = kinetis_ftfx_command(bank->target, FTFx_CMD_BLOCKSTAT, kinfo->prog_base,
+ 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
+
+ if (result != ERROR_OK || (ftfx_fstat & 0x01))
+ block_dirty = true;
+ }
- if (ftfx_fstat & 0x01) {
+ if (block_dirty) {
/* the whole bank is not erased, check sector-by-sector */
int i;
for (i = 0; i < bank->num_sectors; i++) {
/* normal margin */
- result = kinetis_ftfx_command(bank, FTFx_CMD_SECTSTAT, bank->base + bank->sectors[i].offset,
+ result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTSTAT,
+ kinfo->prog_base + bank->sectors[i].offset,
1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
if (result == ERROR_OK) {
bank->sectors[i].is_erased = 1;
}
} else {
- LOG_WARNING("kinetis_blank_check not supported yet for FlexNVM");
+ LOG_WARNING("kinetis_blank_check not supported yet for FlexRAM");
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_OK;
}
+
+COMMAND_HANDLER(kinetis_nvm_partition)
+{
+ int result, i;
+ unsigned long par, log2 = 0, ee1 = 0, ee2 = 0;
+ enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO;
+ bool enable;
+ uint8_t ftfx_fstat;
+ uint8_t load_flex_ram = 1;
+ uint8_t ee_size_code = 0x3f;
+ uint8_t flex_nvm_partition_code = 0;
+ uint8_t ee_split = 3;
+ struct target *target = get_current_target(CMD_CTX);
+ struct flash_bank *bank;
+ struct kinetis_flash_bank *kinfo;
+ uint32_t sim_fcfg1;
+
+ if (CMD_ARGC >= 2) {
+ if (strcmp(CMD_ARGV[0], "dataflash") == 0)
+ sz_type = DF_SIZE;
+ else if (strcmp(CMD_ARGV[0], "eebkp") == 0)
+ sz_type = EEBKP_SIZE;
+
+ par = strtoul(CMD_ARGV[1], NULL, 10);
+ while (par >> (log2 + 3))
+ log2++;
+ }
+ switch (sz_type) {
+ case SHOW_INFO:
+ result = target_read_u32(target, SIM_FCFG1, &sim_fcfg1);
+ if (result != ERROR_OK)
+ return result;
+
+ flex_nvm_partition_code = (uint8_t)((sim_fcfg1 >> 8) & 0x0f);
+ switch (flex_nvm_partition_code) {
+ case 0:
+ command_print(CMD_CTX, "No EEPROM backup, data flash only");
+ break;
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ command_print(CMD_CTX, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
+ break;
+ case 8:
+ command_print(CMD_CTX, "No data flash, EEPROM backup only");
+ break;
+ case 0x9:
+ case 0xA:
+ case 0xB:
+ case 0xC:
+ case 0xD:
+ case 0xE:
+ command_print(CMD_CTX, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
+ break;
+ case 0xf:
+ command_print(CMD_CTX, "No EEPROM backup, data flash only (DEPART not set)");
+ break;
+ default:
+ command_print(CMD_CTX, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
+ }
+ return ERROR_OK;
+
+ case DF_SIZE:
+ flex_nvm_partition_code = 0x8 | log2;
+ break;
+
+ case EEBKP_SIZE:
+ flex_nvm_partition_code = log2;
+ break;
+ }
+
+ if (CMD_ARGC == 3)
+ ee1 = ee2 = strtoul(CMD_ARGV[2], NULL, 10) / 2;
+ else if (CMD_ARGC >= 4) {
+ ee1 = strtoul(CMD_ARGV[2], NULL, 10);
+ ee2 = strtoul(CMD_ARGV[3], NULL, 10);
+ }
+
+ enable = ee1 + ee2 > 0;
+ if (enable) {
+ for (log2 = 2; ; log2++) {
+ if (ee1 + ee2 == (16u << 10) >> log2)
+ break;
+ if (ee1 + ee2 > (16u << 10) >> log2 || log2 >= 9) {
+ LOG_ERROR("Unsupported EEPROM size");
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ }
+
+ if (ee1 * 3 == ee2)
+ ee_split = 1;
+ else if (ee1 * 7 == ee2)
+ ee_split = 0;
+ else if (ee1 != ee2) {
+ LOG_ERROR("Unsupported EEPROM sizes ratio");
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+
+ ee_size_code = log2 | ee_split << 4;
+ }
+
+ if (CMD_ARGC >= 5)
+ COMMAND_PARSE_ON_OFF(CMD_ARGV[4], enable);
+ if (enable)
+ load_flex_ram = 0;
+
+ LOG_INFO("DEPART 0x%" PRIx8 ", EEPROM size code 0x%" PRIx8,
+ flex_nvm_partition_code, ee_size_code);
+
+ if (target->state != TARGET_HALTED) {
+ LOG_ERROR("Target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
+ result = kinetis_ftfx_command(target, FTFx_CMD_PGMPART, load_flex_ram,
+ ee_size_code, flex_nvm_partition_code, 0, 0,
+ 0, 0, 0, 0, &ftfx_fstat);
+ if (result != ERROR_OK)
+ return result;
+
+ command_print(CMD_CTX, "FlexNVM partition set. Please reset MCU.");
+
+ for (i = 1; i < 4; i++) {
+ bank = get_flash_bank_by_num_noprobe(i);
+ if (bank == NULL)
+ break;
+
+ kinfo = bank->driver_priv;
+ if (kinfo && kinfo->flash_class == FC_FLEX_NVM)
+ kinfo->probed = false; /* re-probe before next use */
+ }
+
+ command_print(CMD_CTX, "FlexNVM banks will be re-probed to set new data flash size.");
+ return ERROR_OK;
+}
+
+
static const struct command_registration kinetis_securtiy_command_handlers[] = {
{
.name = "check_security",
.usage = "",
.handler = kinetis_mdm_mass_erase,
},
- {
- .name = "test_securing",
- .mode = COMMAND_EXEC,
- .help = "",
- .usage = "",
- .handler = kinetis_securing_test,
- },
COMMAND_REGISTRATION_DONE
};
.usage = "",
.chain = kinetis_securtiy_command_handlers,
},
+ {
+ .name = "disable_wdog",
+ .mode = COMMAND_EXEC,
+ .help = "Disable the watchdog timer",
+ .usage = "",
+ .handler = kinetis_disable_wdog_handler,
+ },
+ {
+ .name = "nvm_partition",
+ .mode = COMMAND_EXEC,
+ .help = "Show/set data flash or EEPROM backup size in kilobytes,"
+ " set two EEPROM sizes in bytes and FlexRAM loading during reset",
+ .usage = "('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']",
+ .handler = kinetis_nvm_partition,
+ },
COMMAND_REGISTRATION_DONE
};
{
.name = "kinetis",
.mode = COMMAND_ANY,
- .help = "kinetis NAND flash controller commands",
+ .help = "kinetis flash controller commands",
.usage = "",
.chain = kinetis_exec_command_handlers,
},
Code Review / openocd.git / blobdiff