/* Chip ID list
*
- * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
- * options
+ * Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
+ * options, name
*
* Pagesize; 0, 256, 512
* 0 get this information from the extended chip ID
*/
static struct nand_info nand_flash_ids[] =
{
+ /* Vendor Specific Entries */
+ { NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS, "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
+ { NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS, "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
+
/* start "museum" IDs */
- {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
- {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
- {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
- {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
- {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
- {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
- {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
- {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
- {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
- {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
-
- {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
- {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
- {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
- {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
+ { 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"},
+ { 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"},
+ { 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"},
+ { 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
+ { 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
+ { 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"},
+ { 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
+ { 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
+ { 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
+ { 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
+
+ { 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"},
+ { 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
+ { 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
+ { 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
/* end "museum" IDs */
- {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
- {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
- {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
-
- {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
- {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
- {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
-
- {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
- {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
- {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
-
- {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
- {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
- {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
- {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
-
- {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
-
- {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS},
- {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS},
- {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16},
- {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16},
-
- {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS},
- {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS},
- {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16},
- {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16},
-
- {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS},
- {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS},
- {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16},
- {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16},
-
- {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS},
- {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS},
- {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16},
- {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
-
- {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS},
- {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS},
- {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
- {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16},
-
- {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS},
- {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS},
- {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
- {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
-
- {NULL, 0, 0, 0, 0, 0 }
+ { 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"},
+ { 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"},
+ { 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 1.8V 16-bit"},
+ { 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 3.3V 16-bit"},
+
+ { 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"},
+ { 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"},
+ { 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 1.8V 16-bit"},
+ { 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 3.3V 16-bit"},
+
+ { 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"},
+ { 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"},
+ { 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 1.8V 16-bit"},
+ { 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 3.3V 16-bit"},
+
+ { 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
+ { 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
+ { 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"},
+ { 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
+ { 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
+ { 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
+ { 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
+
+ { 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"},
+
+ { 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"},
+ { 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"},
+ { 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"},
+ { 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"},
+
+ { 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"},
+ { 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"},
+ { 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"},
+ { 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"},
+
+ { 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"},
+ { 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"},
+ { 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"},
+ { 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"},
+
+ { 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"},
+ { 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"},
+ { 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"},
+ { 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"},
+
+ { 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"},
+ { 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"},
+ { 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"},
+ { 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"},
+
+ { 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"},
+ { 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
+ { 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"},
+ { 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"},
+
+ { 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
+
+ {0, 0, 0, 0, 0, 0, NULL}
};
/* Manufacturer ID list
};
#endif
-struct nand_device *get_nand_device_by_name(const char *name)
+/**
+ * Returns the flash bank specified by @a name, which matches the
+ * driver name and a suffix (option) specify the driver-specific
+ * bank number. The suffix consists of the '.' and the driver-specific
+ * bank number: when two davinci banks are defined, then 'davinci.1' refers
+ * to the second (e.g. DM355EVM).
+ */
+static struct nand_device *get_nand_device_by_name(const char *name)
{
unsigned requested = get_flash_name_index(name);
unsigned found = 0;
int nand_build_bbt(struct nand_device *nand, int first, int last)
{
- uint32_t page = 0x0;
+ uint32_t page;
int i;
+ int pages_per_block = (nand->erase_size / nand->page_size);
uint8_t oob[6];
+ int ret;
if ((first < 0) || (first >= nand->num_blocks))
first = 0;
if ((last >= nand->num_blocks) || (last == -1))
last = nand->num_blocks - 1;
- for (i = first; i < last; i++)
+ page = first * pages_per_block;
+ for (i = first; i <= last; i++)
{
- nand_read_page(nand, page, NULL, 0, oob, 6);
+ ret = nand_read_page(nand, page, NULL, 0, oob, 6);
+ if (ret != ERROR_OK)
+ return ret;
if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
|| (((nand->page_size == 512) && (oob[5] != 0xff)) ||
nand->blocks[i].is_bad = 0;
}
- page += (nand->erase_size / nand->page_size);
+ page += pages_per_block;
}
return ERROR_OK;
for (i = 0; nand_flash_ids[i].name; i++)
{
- if (nand_flash_ids[i].id == device_id)
+ if (nand_flash_ids[i].id == device_id &&
+ (nand_flash_ids[i].mfr_id == manufacturer_id ||
+ nand_flash_ids[i].mfr_id == 0 ))
{
nand->device = &nand_flash_ids[i];
break;
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
- if ((first_block < 0) || (last_block > nand->num_blocks))
+ if ((first_block < 0) || (last_block >= nand->num_blocks))
return ERROR_INVALID_ARGUMENTS;
/* make sure we know if a block is bad before erasing it */
return ERROR_NAND_OPERATION_TIMEOUT;
}
- if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
+ retval = nand_read_status(nand, &status);
+ if (retval != ERROR_OK)
{
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
#endif
-int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+int nand_write_page(struct nand_device *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size,
+ uint8_t *oob, uint32_t oob_size)
{
uint32_t block;
if (!nand->controller->nand_ready(nand, 100))
return ERROR_NAND_OPERATION_TIMEOUT;
} else {
+ /* nand_poll_read() cannot be used during nand read */
alive_sleep(1);
}
return ERROR_OK;
}
+int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
+{
+ int retval = ERROR_NAND_NO_BUFFER;
+
+ if (nand->controller->read_block_data != NULL)
+ retval = (nand->controller->read_block_data)(nand, data, size);
+
+ if (ERROR_NAND_NO_BUFFER == retval) {
+ uint32_t i;
+ int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
+
+ retval = ERROR_OK;
+ for (i = 0; retval == ERROR_OK && i < size; i += incr) {
+ retval = nand->controller->read_data(nand, data);
+ data += incr;
+ }
+ }
+
+ return retval;
+}
+
int nand_read_page_raw(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size,
uint8_t *oob, uint32_t oob_size)
{
- uint32_t i;
int retval;
retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
return retval;
if (data)
- {
- if (nand->controller->read_block_data != NULL)
- (nand->controller->read_block_data)(nand, data, data_size);
- else
- {
- for (i = 0; i < data_size;)
- {
- if (nand->device->options & NAND_BUSWIDTH_16)
- {
- nand->controller->read_data(nand, data);
- data += 2;
- i += 2;
- }
- else
- {
- nand->controller->read_data(nand, data);
- data += 1;
- i += 1;
- }
- }
- }
- }
+ nand_read_data_page(nand, data, data_size);
if (oob)
- {
- if (nand->controller->read_block_data != NULL)
- (nand->controller->read_block_data)(nand, oob, oob_size);
- else
- {
- for (i = 0; i < oob_size;)
- {
- if (nand->device->options & NAND_BUSWIDTH_16)
- {
- nand->controller->read_data(nand, oob);
- oob += 2;
- i += 2;
- }
- else
- {
- nand->controller->read_data(nand, oob);
- oob += 1;
- i += 1;
- }
- }
- }
- }
+ nand_read_data_page(nand, oob, oob_size);
return ERROR_OK;
}
-int nand_write_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
{
- uint32_t i;
- int retval;
- uint8_t status;
+ int retval = ERROR_NAND_NO_BUFFER;
- retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
- if (ERROR_OK != retval)
- return retval;
+ if (nand->controller->write_block_data != NULL)
+ retval = (nand->controller->write_block_data)(nand, data, size);
- if (data)
- {
- if (nand->controller->write_block_data != NULL)
- (nand->controller->write_block_data)(nand, data, data_size);
- else
- {
- for (i = 0; i < data_size;)
- {
- if (nand->device->options & NAND_BUSWIDTH_16)
- {
- uint16_t data_buf = le_to_h_u16(data);
- nand->controller->write_data(nand, data_buf);
- data += 2;
- i += 2;
- }
- else
- {
- nand->controller->write_data(nand, *data);
- data += 1;
- i += 1;
- }
- }
- }
- }
+ if (ERROR_NAND_NO_BUFFER == retval) {
+ bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
+ uint32_t incr = is16bit ? 2 : 1;
+ uint16_t write_data;
+ uint32_t i;
- if (oob)
- {
- if (nand->controller->write_block_data != NULL)
- (nand->controller->write_block_data)(nand, oob, oob_size);
- else
- {
- for (i = 0; i < oob_size;)
- {
- if (nand->device->options & NAND_BUSWIDTH_16)
- {
- uint16_t oob_buf = le_to_h_u16(data);
- nand->controller->write_data(nand, oob_buf);
- oob += 2;
- i += 2;
- }
- else
- {
- nand->controller->write_data(nand, *oob);
- oob += 1;
- i += 1;
- }
- }
+ for (i = 0; i < size; i += incr) {
+ if (is16bit)
+ write_data = le_to_h_u16(data);
+ else
+ write_data = *data;
+
+ retval = nand->controller->write_data(nand, write_data);
+ if (ERROR_OK != retval)
+ break;
+
+ data += incr;
}
}
+ return retval;
+}
+
+int nand_write_finish(struct nand_device *nand)
+{
+ int retval;
+ uint8_t status;
+
nand->controller->command(nand, NAND_CMD_PAGEPROG);
retval = nand->controller->nand_ready ?
if (!retval)
return ERROR_NAND_OPERATION_TIMEOUT;
- if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
- {
+ retval = nand_read_status(nand, &status);
+ if (ERROR_OK != retval) {
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
- if (status & NAND_STATUS_FAIL)
- {
- LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
+ if (status & NAND_STATUS_FAIL) {
+ LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
+ status);
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
+int nand_write_page_raw(struct nand_device *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size,
+ uint8_t *oob, uint32_t oob_size)
+{
+ int retval;
+
+ retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
+ if (ERROR_OK != retval)
+ return retval;
+
+ if (data) {
+ retval = nand_write_data_page(nand, data, data_size);
+ if (ERROR_OK != retval) {
+ LOG_ERROR("Unable to write data to NAND device");
+ return retval;
+ }
+ }
+
+ if (oob) {
+ retval = nand_write_data_page(nand, oob, oob_size);
+ if (ERROR_OK != retval) {
+ LOG_ERROR("Unable to write OOB data to NAND device");
+ return retval;
+ }
+ }
+
+ return nand_write_finish(nand);
+}
+
Code Review / openocd.git / blobdiff