* Architecture and Core Commands:: Architecture and Core Commands
* JTAG Commands:: JTAG Commands
* Boundary Scan Commands:: Boundary Scan Commands
+* Utility Commands:: Utility Commands
* TFTP:: TFTP
* GDB and OpenOCD:: Using GDB and OpenOCD
* Tcl Scripting API:: Tcl Scripting API
@unnumbered About
@cindex about
-OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
-University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
+OpenOCD was created by Dominic Rath as part of a 2005 diploma thesis written
+at the University of Applied Sciences Augsburg (@uref{http://www.hs-augsburg.de}).
Since that time, the project has grown into an active open-source project,
supported by a diverse community of software and hardware developers from
around the world.
These adapters are sometimes packaged as discrete dongles, which
may generically be called @dfn{hardware interface dongles}.
Some development boards also integrate them directly, which may
-let the development board can be directly connected to the debug
+let the development board connect directly to the debug
host over USB (and sometimes also to power it over USB).
For example, a @dfn{JTAG Adapter} supports JTAG
There are also @dfn{SWD Adapters} that support Serial Wire Debug (SWD)
signaling to communicate with some newer ARM cores, as well as debug
-adapters which support both JTAG and SWD transports. SWD only supports
+adapters which support both JTAG and SWD transports. SWD supports only
debugging, whereas JTAG also supports boundary scan operations.
For some chips, there are also @dfn{Programming Adapters} supporting
(At this writing, OpenOCD does not support such non-debug adapters.)
-@b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
-based, parallel port based, and other standalone boxes that run
+@b{Dongles:} OpenOCD currently supports many types of hardware dongles:
+USB-based, parallel port-based, and other standalone boxes that run
OpenOCD internally. @xref{Debug Adapter Hardware}.
@b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
Cortex-M3 (Stellaris LM3, ST STM32 and Energy Micro EFM32) based cores to be
debugged via the GDB protocol.
-@b{Flash Programing:} Flash writing is supported for external CFI
-compatible NOR flashes (Intel and AMD/Spansion command set) and several
+@b{Flash Programming:} Flash writing is supported for external
+CFI-compatible NOR flashes (Intel and AMD/Spansion command set) and several
internal flashes (LPC1700, LPC1800, LPC2000, LPC4300, AT91SAM7, AT91SAM3U,
STR7x, STR9x, LM3, STM32x and EFM32). Preliminary support for various NAND flash
-controllers (LPC3180, Orion, S3C24xx, more) controller is included.
+controllers (LPC3180, Orion, S3C24xx, more) is included.
@section OpenOCD Web Site
The resources in this chapter are available for developers wishing to explore
or expand the OpenOCD source code.
-@section OpenOCD GIT Repository
+@section OpenOCD Git Repository
During the 0.3.x release cycle, OpenOCD switched from Subversion to
-a GIT repository hosted at SourceForge. The repository URL is:
+a Git repository hosted at SourceForge. The repository URL is:
@uref{git://git.code.sf.net/p/openocd/code}
@uref{http://repo.or.cz/r/openocd.git}
-With standard GIT tools, use @command{git clone} to initialize
+With standard Git tools, use @command{git clone} to initialize
a local repository, and @command{git pull} to update it.
There are also gitweb pages letting you browse the repository
with a web browser, or download arbitrary snapshots without
-needing a GIT client:
+needing a Git client:
@uref{http://repo.or.cz/w/openocd.git}
This document is a work-in-progress, but contributions would be welcome
to fill in the gaps. All of the source files are provided in-tree,
-listed in the Doxyfile configuration in the top of the source tree.
+listed in the Doxyfile configuration at the top of the source tree.
@section OpenOCD Developer Mailing List
@cindex USB Adapter
@cindex RTCK
-Defined: @b{dongle}: A small device that plugins into a computer and serves as
+Defined: @b{dongle}: A small device that plugs into a computer and serves as
an adapter .... [snip]
In the OpenOCD case, this generally refers to @b{a small adapter} that
-attaches to your computer via USB or the Parallel Printer Port. One
-exception is the Zylin ZY1000, packaged as a small box you attach via
-an ethernet cable. The Zylin ZY1000 has the advantage that it does not
+attaches to your computer via USB or the parallel port. One
+exception is the Ultimate Solutions ZY1000, packaged as a small box you
+attach via an ethernet cable. The ZY1000 has the advantage that it does not
require any drivers to be installed on the developer PC. It also has
a built in web interface. It supports RTCK/RCLK or adaptive clocking
-and has a built in relay to power cycle targets remotely.
+and has a built-in relay to power cycle targets remotely.
@section Choosing a Dongle
@item @b{Pinout} What pinout does your target board use?
Does your dongle support it? You may be able to use jumper
wires, or an "octopus" connector, to convert pinouts.
-@item @b{Connection} Does your computer have the USB, printer, or
+@item @b{Connection} Does your computer have the USB, parallel, or
Ethernet port needed?
@item @b{RTCK} Do you expect to use it with ARM chips and boards with
-RTCK support? Also known as ``adaptive clocking''
+RTCK support (also known as ``adaptive clocking'')?
@end enumerate
-@section Stand alone Systems
+@section Stand-alone JTAG Probe
-@b{ZY1000} See: @url{http://www.ultsol.com/index.php/component/content/article/8/33-zylin-zy1000-jtag-probe}
-Technically, not a dongle, but a standalone box. The ZY1000 has the advantage that it does
-not require any drivers installed on the developer PC. It also has
-a built in web interface. It supports RTCK/RCLK or adaptive clocking
-and has a built in relay to power cycle targets remotely.
+The ZY1000 from Ultimate Solutions is technically not a dongle but a
+stand-alone JTAG probe that, unlike most dongles, doesn't require any drivers
+running on the developer's host computer.
+Once installed on a network using DHCP or a static IP assignment, users can
+access the ZY1000 probe locally or remotely from any host with access to the
+IP address assigned to the probe.
+The ZY1000 provides an intuitive web interface with direct access to the
+OpenOCD debugger.
+Users may also run a GDBSERVER directly on the ZY1000 to take full advantage
+of GCC & GDB to debug any distribution of embedded Linux or NetBSD running on
+the target.
+The ZY1000 supports RTCK & RCLK or adaptive clocking and has a built-in relay
+to power cycle the target remotely.
+
+For more information, visit:
+
+@b{ZY1000} See: @url{http://www.ultsol.com/index.php/component/content/article/8/210-zylin-zy1000-main}
@section USB FT2232 Based
-There are many USB JTAG dongles on the market, many of them are based
+There are many USB JTAG dongles on the market, many of them based
on a chip from ``Future Technology Devices International'' (FTDI)
known as the FTDI FT2232; this is a USB full speed (12 Mbps) chip.
See: @url{http://www.ftdichip.com} for more information.
In summer 2009, USB high speed (480 Mbps) versions of these FTDI
-chips are starting to become available in JTAG adapters. (Adapters
-using those high speed FT2232H chips may support adaptive clocking.)
+chips started to become available in JTAG adapters. Around 2012, a new
+variant appeared - FT232H - this is a single-channel version of FT2232H.
+(Adapters using those high speed FT2232H or FT232H chips may support adaptive
+clocking.)
The FT2232 chips are flexible enough to support some other
transport options, such as SWD or the SPI variants used to
other one is used to provide a debug adapter.
Also, some development boards integrate an FT2232 chip to serve as
-a built-in low cost debug adapter and usb-to-serial solution.
+a built-in low-cost debug adapter and USB-to-serial solution.
@itemize @bullet
@item @b{usbjtag}
@item @b{opendous}
@* Link @url{http://code.google.com/p/opendous/wiki/JTAG} FT2232H-based
(OpenHardware).
-@end itemize
+@item @b{JTAG-lock-pick Tiny 2}
+@* Link @url{http://www.distortec.com/jtag-lock-pick-tiny-2} FT232H-based
+
+@item @b{GW16042}
+@* Link: @url{http://shop.gateworks.com/index.php?route=product/product&path=70_80&product_id=64}
+FT2232H-based
+@end itemize
@section USB-JTAG / Altera USB-Blaster compatibles
These devices also show up as FTDI devices, but are not
protocol-compatible with the FT2232 devices. They are, however,
protocol-compatible among themselves. USB-JTAG devices typically consist
of a FT245 followed by a CPLD that understands a particular protocol,
-or emulate this protocol using some other hardware.
+or emulates this protocol using some other hardware.
They may appear under different USB VID/PID depending on the particular
product. The driver can be configured to search for any VID/PID pair
@* Link: @url{http://www.st.com/internet/evalboard/product/251168.jsp}
@end itemize
-For info the original ST-LINK enumerates using the mass storage usb class, however
-it's implementation is completely broken. The result is this causes issues under linux.
-The simplest solution is to get linux to ignore the ST-LINK using one of the following methods:
+For info the original ST-LINK enumerates using the mass storage usb class; however,
+its implementation is completely broken. The result is this causes issues under Linux.
+The simplest solution is to get Linux to ignore the ST-LINK using one of the following methods:
@itemize @bullet
@item modprobe -r usb-storage && modprobe usb-storage quirks=483:3744:i
@item add "options usb-storage quirks=483:3744:i" to /etc/modprobe.conf
@section IBM PC Parallel Printer Port Based
-The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
+The two well-known ``JTAG Parallel Ports'' cables are the Xilinx DLC5
and the Macraigor Wiggler. There are many clones and variations of
these on the market.
@item @b{Amontec - JTAG Accelerator}
@* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
-@item @b{GW16402}
-@* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
-
@item @b{Wiggler2}
@* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
@item @b{at91rm9200}
@* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
+@item @b{bcm2835gpio}
+@* A BCM2835-based board (e.g. Raspberry Pi) using the GPIO pins of the expansion header.
+
+@item @b{jtag_vpi}
+@* A JTAG driver acting as a client for the JTAG VPI server interface.
+@* Link: @url{http://github.com/fjullien/jtag_vpi}
+
@end itemize
@node About Jim-Tcl
All commands presented in this Guide are extensions to Jim-Tcl.
You can use them as simple commands, without needing to learn
much of anything about Tcl.
-Alternatively, can write Tcl programs with them.
+Alternatively, you can write Tcl programs with them.
-You can learn more about Jim at its website, @url{http://jim.berlios.de}.
+You can learn more about Jim at its website, @url{http://jim.tcl.tk}.
There is an active and responsive community, get on the mailing list
if you have any questions. Jim-Tcl maintainers also lurk on the
OpenOCD mailing list.
@item @b{Scripts}
@* OpenOCD configuration scripts are Jim-Tcl Scripts. OpenOCD's
command interpreter today is a mixture of (newer)
-Jim-Tcl commands, and (older) the orginal command interpreter.
+Jim-Tcl commands, and the (older) original command interpreter.
@item @b{Commands}
@* At the OpenOCD telnet command line (or via the GDB monitor command) one
@item @b{Historical Note}
@* Jim-Tcl was introduced to OpenOCD in spring 2008. Fall 2010,
-before OpenOCD 0.5 release OpenOCD switched to using Jim Tcl
-as a git submodule, which greatly simplified upgrading Jim Tcl
-to benefit from new features and bugfixes in Jim Tcl.
+before OpenOCD 0.5 release, OpenOCD switched to using Jim-Tcl
+as a Git submodule, which greatly simplified upgrading Jim-Tcl
+to benefit from new features and bugfixes in Jim-Tcl.
@item @b{Need a crash course in Tcl?}
@*@xref{Tcl Crash Course}.
If you find a script for your JTAG adapter, and for your board or
target, you may be able to hook up your JTAG adapter then start
-the server like:
+the server with some variation of one of the following:
@example
openocd -f interface/ADAPTER.cfg -f board/MYBOARD.cfg
+openocd -f interface/ftdi/ADAPTER.cfg -f board/MYBOARD.cfg
@end example
You might also need to configure which reset signals are present,
@chapter OpenOCD Project Setup
To use OpenOCD with your development projects, you need to do more than
-just connecting the JTAG adapter hardware (dongle) to your development board
-and then starting the OpenOCD server.
-You also need to configure that server so that it knows
-about that adapter and board, and helps your work.
+just connect the JTAG adapter hardware (dongle) to your development board
+and start the OpenOCD server.
+You also need to configure your OpenOCD server so that it knows
+about your adapter and board, and helps your work.
You may also want to connect OpenOCD to GDB, possibly
using Eclipse or some other GUI.
you are using to run OpenOCD.
For Ethernet, consult the documentation and your network administrator.
-For USB based JTAG adapters you have an easy sanity check at this point:
-does the host operating system see the JTAG adapter? If that host is an
+For USB-based JTAG adapters you have an easy sanity check at this point:
+does the host operating system see the JTAG adapter? If you're running
+Linux, try the @command{lsusb} command. If that host is an
MS-Windows host, you'll need to install a driver before OpenOCD works.
@item @emph{Connect the adapter's power supply, if needed.}
@item
You may may need to write some C code.
-It may be as simple as a supporting a new ft2232 or parport
+It may be as simple as supporting a new FT2232 or parport
based adapter; a bit more involved, like a NAND or NOR flash
controller driver; or a big piece of work like supporting
a new chip architecture.
These are for debug adapters.
Files that configure JTAG adapters go here.
@example
-$ ls interface
-altera-usb-blaster.cfg hilscher_nxhx50_etm.cfg openrd.cfg
-arm-jtag-ew.cfg hilscher_nxhx50_re.cfg osbdm.cfg
-arm-usb-ocd.cfg hitex_str9-comstick.cfg parport.cfg
-at91rm9200.cfg icebear.cfg parport_dlc5.cfg
-axm0432.cfg jlink.cfg redbee-econotag.cfg
-busblaster.cfg jtagkey2.cfg redbee-usb.cfg
-buspirate.cfg jtagkey2p.cfg rlink.cfg
-calao-usb-a9260-c01.cfg jtagkey.cfg sheevaplug.cfg
-calao-usb-a9260-c02.cfg jtagkey-tiny.cfg signalyzer.cfg
-calao-usb-a9260.cfg kt-link.cfg signalyzer-h2.cfg
-chameleon.cfg lisa-l.cfg signalyzer-h4.cfg
-cortino.cfg luminary.cfg signalyzer-lite.cfg
-digilent-hs1.cfg luminary-icdi.cfg stlink-v1.cfg
-dlp-usb1232h.cfg luminary-lm3s811.cfg stlink-v2.cfg
-dummy.cfg minimodule.cfg stm32-stick.cfg
-estick.cfg neodb.cfg turtelizer2.cfg
-flashlink.cfg ngxtech.cfg ulink.cfg
-flossjtag.cfg olimex-arm-usb-ocd.cfg usb-jtag.cfg
-flossjtag-noeeprom.cfg olimex-arm-usb-ocd-h.cfg usbprog.cfg
-flyswatter2.cfg olimex-arm-usb-tiny-h.cfg vpaclink.cfg
-flyswatter.cfg olimex-jtag-tiny.cfg vsllink.cfg
-hilscher_nxhx10_etm.cfg oocdlink.cfg xds100v2.cfg
-hilscher_nxhx500_etm.cfg opendous.cfg
-hilscher_nxhx500_re.cfg openocd-usb.cfg
+$ ls interface -R
+interface/:
+altera-usb-blaster.cfg hilscher_nxhx50_re.cfg openocd-usb-hs.cfg
+arm-jtag-ew.cfg hitex_str9-comstick.cfg openrd.cfg
+at91rm9200.cfg icebear.cfg osbdm.cfg
+axm0432.cfg jlink.cfg parport.cfg
+busblaster.cfg jtagkey2.cfg parport_dlc5.cfg
+buspirate.cfg jtagkey2p.cfg redbee-econotag.cfg
+calao-usb-a9260-c01.cfg jtagkey.cfg redbee-usb.cfg
+calao-usb-a9260-c02.cfg jtagkey-tiny.cfg rlink.cfg
+calao-usb-a9260.cfg jtag-lock-pick_tiny_2.cfg sheevaplug.cfg
+chameleon.cfg kt-link.cfg signalyzer.cfg
+cortino.cfg lisa-l.cfg signalyzer-h2.cfg
+digilent-hs1.cfg luminary.cfg signalyzer-h4.cfg
+dlp-usb1232h.cfg luminary-icdi.cfg signalyzer-lite.cfg
+dummy.cfg luminary-lm3s811.cfg stlink-v1.cfg
+estick.cfg minimodule.cfg stlink-v2.cfg
+flashlink.cfg neodb.cfg stm32-stick.cfg
+flossjtag.cfg ngxtech.cfg sysfsgpio-raspberrypi.cfg
+flossjtag-noeeprom.cfg olimex-arm-usb-ocd.cfg ti-icdi.cfg
+flyswatter2.cfg olimex-arm-usb-ocd-h.cfg turtelizer2.cfg
+flyswatter.cfg olimex-arm-usb-tiny-h.cfg ulink.cfg
+ftdi olimex-jtag-tiny.cfg usb-jtag.cfg
+hilscher_nxhx10_etm.cfg oocdlink.cfg usbprog.cfg
+hilscher_nxhx500_etm.cfg opendous.cfg vpaclink.cfg
+hilscher_nxhx500_re.cfg opendous_ftdi.cfg vsllink.cfg
+hilscher_nxhx50_etm.cfg openocd-usb.cfg xds100v2.cfg
+
+interface/ftdi:
+axm0432.cfg hitex_str9-comstick.cfg olimex-jtag-tiny.cfg
+calao-usb-a9260-c01.cfg icebear.cfg oocdlink.cfg
+calao-usb-a9260-c02.cfg jtagkey2.cfg opendous_ftdi.cfg
+cortino.cfg jtagkey2p.cfg openocd-usb.cfg
+dlp-usb1232h.cfg jtagkey.cfg openocd-usb-hs.cfg
+dp_busblaster.cfg jtag-lock-pick_tiny_2.cfg openrd.cfg
+flossjtag.cfg kt-link.cfg redbee-econotag.cfg
+flossjtag-noeeprom.cfg lisa-l.cfg redbee-usb.cfg
+flyswatter2.cfg luminary.cfg sheevaplug.cfg
+flyswatter.cfg luminary-icdi.cfg signalyzer.cfg
+gw16042.cfg luminary-lm3s811.cfg signalyzer-lite.cfg
+hilscher_nxhx10_etm.cfg minimodule.cfg stm32-stick.cfg
+hilscher_nxhx500_etm.cfg neodb.cfg turtelizer2-revB.cfg
+hilscher_nxhx500_re.cfg ngxtech.cfg turtelizer2-revC.cfg
+hilscher_nxhx50_etm.cfg olimex-arm-usb-ocd.cfg vpaclink.cfg
+hilscher_nxhx50_re.cfg olimex-arm-usb-ocd-h.cfg xds100v2.cfg
+hitex_lpc1768stick.cfg olimex-arm-usb-tiny-h.cfg
$
@end example
@item @file{board} ...
a CPU and an FPGA.
@example
$ ls board
-actux3.cfg logicpd_imx27.cfg
-am3517evm.cfg lubbock.cfg
-arm_evaluator7t.cfg mcb1700.cfg
-at91cap7a-stk-sdram.cfg microchip_explorer16.cfg
-at91eb40a.cfg mini2440.cfg
-at91rm9200-dk.cfg mini6410.cfg
-at91rm9200-ek.cfg olimex_LPC2378STK.cfg
-at91sam9261-ek.cfg olimex_lpc_h2148.cfg
-at91sam9263-ek.cfg olimex_sam7_ex256.cfg
-at91sam9g20-ek.cfg olimex_sam9_l9260.cfg
-atmel_at91sam7s-ek.cfg olimex_stm32_h103.cfg
-atmel_at91sam9260-ek.cfg olimex_stm32_h107.cfg
-atmel_at91sam9rl-ek.cfg olimex_stm32_p107.cfg
-atmel_sam3n_ek.cfg omap2420_h4.cfg
-atmel_sam3s_ek.cfg open-bldc.cfg
-atmel_sam3u_ek.cfg openrd.cfg
-atmel_sam3x_ek.cfg osk5912.cfg
-atmel_sam4s_ek.cfg phytec_lpc3250.cfg
-balloon3-cpu.cfg pic-p32mx.cfg
-colibri.cfg propox_mmnet1001.cfg
-crossbow_tech_imote2.cfg pxa255_sst.cfg
-csb337.cfg redbee.cfg
-csb732.cfg rsc-w910.cfg
-da850evm.cfg sheevaplug.cfg
-digi_connectcore_wi-9c.cfg smdk6410.cfg
-diolan_lpc4350-db1.cfg spear300evb.cfg
-dm355evm.cfg spear300evb_mod.cfg
-dm365evm.cfg spear310evb20.cfg
-dm6446evm.cfg spear310evb20_mod.cfg
-efikamx.cfg spear320cpu.cfg
-eir.cfg spear320cpu_mod.cfg
-ek-lm3s1968.cfg steval_pcc010.cfg
-ek-lm3s3748.cfg stm320518_eval_stlink.cfg
-ek-lm3s6965.cfg stm32100b_eval.cfg
-ek-lm3s811.cfg stm3210b_eval.cfg
-ek-lm3s811-revb.cfg stm3210c_eval.cfg
-ek-lm3s9b9x.cfg stm3210e_eval.cfg
+actux3.cfg lpc1850_spifi_generic.cfg
+am3517evm.cfg lpc4350_spifi_generic.cfg
+arm_evaluator7t.cfg lubbock.cfg
+at91cap7a-stk-sdram.cfg mcb1700.cfg
+at91eb40a.cfg microchip_explorer16.cfg
+at91rm9200-dk.cfg mini2440.cfg
+at91rm9200-ek.cfg mini6410.cfg
+at91sam9261-ek.cfg netgear-dg834v3.cfg
+at91sam9263-ek.cfg olimex_LPC2378STK.cfg
+at91sam9g20-ek.cfg olimex_lpc_h2148.cfg
+atmel_at91sam7s-ek.cfg olimex_sam7_ex256.cfg
+atmel_at91sam9260-ek.cfg olimex_sam9_l9260.cfg
+atmel_at91sam9rl-ek.cfg olimex_stm32_h103.cfg
+atmel_sam3n_ek.cfg olimex_stm32_h107.cfg
+atmel_sam3s_ek.cfg olimex_stm32_p107.cfg
+atmel_sam3u_ek.cfg omap2420_h4.cfg
+atmel_sam3x_ek.cfg open-bldc.cfg
+atmel_sam4s_ek.cfg openrd.cfg
+balloon3-cpu.cfg osk5912.cfg
+colibri.cfg phone_se_j100i.cfg
+crossbow_tech_imote2.cfg phytec_lpc3250.cfg
+csb337.cfg pic-p32mx.cfg
+csb732.cfg propox_mmnet1001.cfg
+da850evm.cfg pxa255_sst.cfg
+digi_connectcore_wi-9c.cfg redbee.cfg
+diolan_lpc4350-db1.cfg rsc-w910.cfg
+dm355evm.cfg sheevaplug.cfg
+dm365evm.cfg smdk6410.cfg
+dm6446evm.cfg spear300evb.cfg
+efikamx.cfg spear300evb_mod.cfg
+eir.cfg spear310evb20.cfg
+ek-lm3s1968.cfg spear310evb20_mod.cfg
+ek-lm3s3748.cfg spear320cpu.cfg
+ek-lm3s6965.cfg spear320cpu_mod.cfg
+ek-lm3s811.cfg steval_pcc010.cfg
+ek-lm3s811-revb.cfg stm320518_eval_stlink.cfg
+ek-lm3s8962.cfg stm32100b_eval.cfg
+ek-lm3s9b9x.cfg stm3210b_eval.cfg
+ek-lm3s9d92.cfg stm3210c_eval.cfg
+ek-lm4f120xl.cfg stm3210e_eval.cfg
ek-lm4f232.cfg stm3220g_eval.cfg
embedded-artists_lpc2478-32.cfg stm3220g_eval_stlink.cfg
ethernut3.cfg stm3241g_eval.cfg
glyn_tonga2.cfg stm3241g_eval_stlink.cfg
hammer.cfg stm32f0discovery.cfg
-hilscher_nxdb500sys.cfg stm32f4discovery.cfg
-hilscher_nxeb500hmi.cfg stm32ldiscovery.cfg
-hilscher_nxhx10.cfg stm32vldiscovery.cfg
-hilscher_nxhx500.cfg str910-eval.cfg
-hilscher_nxhx50.cfg telo.cfg
-hilscher_nxsb100.cfg ti_beagleboard.cfg
-hitex_lpc2929.cfg ti_beagleboard_xm.cfg
-hitex_stm32-performancestick.cfg ti_beaglebone.cfg
-hitex_str9-comstick.cfg ti_blaze.cfg
-iar_lpc1768.cfg ti_pandaboard.cfg
-iar_str912_sk.cfg ti_pandaboard_es.cfg
-icnova_imx53_sodimm.cfg topas910.cfg
-icnova_sam9g45_sodimm.cfg topasa900.cfg
-imx27ads.cfg twr-k60n512.cfg
-imx27lnst.cfg tx25_stk5.cfg
-imx28evk.cfg tx27_stk5.cfg
-imx31pdk.cfg unknown_at91sam9260.cfg
-imx35pdk.cfg uptech_2410.cfg
-imx53loco.cfg verdex.cfg
-keil_mcb1700.cfg voipac.cfg
-keil_mcb2140.cfg voltcraft_dso-3062c.cfg
-kwikstik.cfg x300t.cfg
-linksys_nslu2.cfg zy1000.cfg
-lisa-l.cfg
+hilscher_nxdb500sys.cfg stm32f3discovery.cfg
+hilscher_nxeb500hmi.cfg stm32f4discovery.cfg
+hilscher_nxhx10.cfg stm32ldiscovery.cfg
+hilscher_nxhx500.cfg stm32vldiscovery.cfg
+hilscher_nxhx50.cfg str910-eval.cfg
+hilscher_nxsb100.cfg telo.cfg
+hitex_lpc1768stick.cfg ti_am335xevm.cfg
+hitex_lpc2929.cfg ti_beagleboard.cfg
+hitex_stm32-performancestick.cfg ti_beagleboard_xm.cfg
+hitex_str9-comstick.cfg ti_beaglebone.cfg
+iar_lpc1768.cfg ti_blaze.cfg
+iar_str912_sk.cfg ti_pandaboard.cfg
+icnova_imx53_sodimm.cfg ti_pandaboard_es.cfg
+icnova_sam9g45_sodimm.cfg topas910.cfg
+imx27ads.cfg topasa900.cfg
+imx27lnst.cfg twr-k60f120m.cfg
+imx28evk.cfg twr-k60n512.cfg
+imx31pdk.cfg tx25_stk5.cfg
+imx35pdk.cfg tx27_stk5.cfg
+imx53loco.cfg unknown_at91sam9260.cfg
+keil_mcb1700.cfg uptech_2410.cfg
+keil_mcb2140.cfg verdex.cfg
+kwikstik.cfg voipac.cfg
+linksys_nslu2.cfg voltcraft_dso-3062c.cfg
+lisa-l.cfg x300t.cfg
+logicpd_imx27.cfg zy1000.cfg
$
@end example
@item @file{target} ...
the target config file defines all of them.
@example
$ ls target
-$duc702x.cfg ixp42x.cfg
-am335x.cfg k40.cfg
-amdm37x.cfg k60.cfg
-ar71xx.cfg lpc1768.cfg
-at32ap7000.cfg lpc2103.cfg
-at91r40008.cfg lpc2124.cfg
-at91rm9200.cfg lpc2129.cfg
-at91sam3ax_4x.cfg lpc2148.cfg
-at91sam3ax_8x.cfg lpc2294.cfg
-at91sam3ax_xx.cfg lpc2378.cfg
-at91sam3nXX.cfg lpc2460.cfg
-at91sam3sXX.cfg lpc2478.cfg
-at91sam3u1c.cfg lpc2900.cfg
-at91sam3u1e.cfg lpc2xxx.cfg
-at91sam3u2c.cfg lpc3131.cfg
-at91sam3u2e.cfg lpc3250.cfg
-at91sam3u4c.cfg lpc4350.cfg
-at91sam3u4e.cfg mc13224v.cfg
-at91sam3uxx.cfg nuc910.cfg
-at91sam3XXX.cfg omap2420.cfg
-at91sam4sXX.cfg omap3530.cfg
-at91sam4XXX.cfg omap4430.cfg
-at91sam7se512.cfg omap4460.cfg
-at91sam7sx.cfg omap5912.cfg
-at91sam7x256.cfg omapl138.cfg
-at91sam7x512.cfg pic32mx.cfg
-at91sam9260.cfg pxa255.cfg
-at91sam9260_ext_RAM_ext_flash.cfg pxa270.cfg
-at91sam9261.cfg pxa3xx.cfg
-at91sam9263.cfg readme.txt
-at91sam9.cfg samsung_s3c2410.cfg
-at91sam9g10.cfg samsung_s3c2440.cfg
-at91sam9g20.cfg samsung_s3c2450.cfg
-at91sam9g45.cfg samsung_s3c4510.cfg
-at91sam9rl.cfg samsung_s3c6410.cfg
-atmega128.cfg sharp_lh79532.cfg
-avr32.cfg smp8634.cfg
-c100.cfg spear3xx.cfg
-c100config.tcl stellaris.cfg
-c100helper.tcl stm32.cfg
-c100regs.tcl stm32f0x_stlink.cfg
-cs351x.cfg stm32f1x.cfg
-davinci.cfg stm32f1x_stlink.cfg
-dragonite.cfg stm32f2x.cfg
-dsp56321.cfg stm32f2x_stlink.cfg
-dsp568013.cfg stm32f2xxx.cfg
-dsp568037.cfg stm32f4x.cfg
-epc9301.cfg stm32f4x_stlink.cfg
-faux.cfg stm32l.cfg
-feroceon.cfg stm32lx_stlink.cfg
-fm3.cfg stm32_stlink.cfg
-hilscher_netx10.cfg stm32xl.cfg
-hilscher_netx500.cfg str710.cfg
-hilscher_netx50.cfg str730.cfg
-icepick.cfg str750.cfg
-imx21.cfg str912.cfg
-imx25.cfg swj-dp.tcl
-imx27.cfg test_reset_syntax_error.cfg
-imx28.cfg test_syntax_error.cfg
-imx31.cfg ti_dm355.cfg
-imx35.cfg ti_dm365.cfg
-imx51.cfg ti_dm6446.cfg
-imx53.cfg tmpa900.cfg
-imx.cfg tmpa910.cfg
-is5114.cfg u8500.cfg
+aduc702x.cfg lpc1763.cfg
+am335x.cfg lpc1764.cfg
+amdm37x.cfg lpc1765.cfg
+ar71xx.cfg lpc1766.cfg
+at32ap7000.cfg lpc1767.cfg
+at91r40008.cfg lpc1768.cfg
+at91rm9200.cfg lpc1769.cfg
+at91sam3ax_4x.cfg lpc1788.cfg
+at91sam3ax_8x.cfg lpc17xx.cfg
+at91sam3ax_xx.cfg lpc1850.cfg
+at91sam3nXX.cfg lpc2103.cfg
+at91sam3sXX.cfg lpc2124.cfg
+at91sam3u1c.cfg lpc2129.cfg
+at91sam3u1e.cfg lpc2148.cfg
+at91sam3u2c.cfg lpc2294.cfg
+at91sam3u2e.cfg lpc2378.cfg
+at91sam3u4c.cfg lpc2460.cfg
+at91sam3u4e.cfg lpc2478.cfg
+at91sam3uxx.cfg lpc2900.cfg
+at91sam3XXX.cfg lpc2xxx.cfg
+at91sam4sd32x.cfg lpc3131.cfg
+at91sam4sXX.cfg lpc3250.cfg
+at91sam4XXX.cfg lpc4350.cfg
+at91sam7se512.cfg lpc4350.cfg.orig
+at91sam7sx.cfg mc13224v.cfg
+at91sam7x256.cfg nuc910.cfg
+at91sam7x512.cfg omap2420.cfg
+at91sam9260.cfg omap3530.cfg
+at91sam9260_ext_RAM_ext_flash.cfg omap4430.cfg
+at91sam9261.cfg omap4460.cfg
+at91sam9263.cfg omap5912.cfg
+at91sam9.cfg omapl138.cfg
+at91sam9g10.cfg pic32mx.cfg
+at91sam9g20.cfg pxa255.cfg
+at91sam9g45.cfg pxa270.cfg
+at91sam9rl.cfg pxa3xx.cfg
+atmega128.cfg readme.txt
+avr32.cfg samsung_s3c2410.cfg
+c100.cfg samsung_s3c2440.cfg
+c100config.tcl samsung_s3c2450.cfg
+c100helper.tcl samsung_s3c4510.cfg
+c100regs.tcl samsung_s3c6410.cfg
+cs351x.cfg sharp_lh79532.cfg
+davinci.cfg smp8634.cfg
+dragonite.cfg spear3xx.cfg
+dsp56321.cfg stellaris.cfg
+dsp568013.cfg stellaris_icdi.cfg
+dsp568037.cfg stm32f0x_stlink.cfg
+efm32_stlink.cfg stm32f1x.cfg
+epc9301.cfg stm32f1x_stlink.cfg
+faux.cfg stm32f2x.cfg
+feroceon.cfg stm32f2x_stlink.cfg
+fm3.cfg stm32f3x.cfg
+hilscher_netx10.cfg stm32f3x_stlink.cfg
+hilscher_netx500.cfg stm32f4x.cfg
+hilscher_netx50.cfg stm32f4x_stlink.cfg
+icepick.cfg stm32l.cfg
+imx21.cfg stm32lx_dual_bank.cfg
+imx25.cfg stm32lx_stlink.cfg
+imx27.cfg stm32_stlink.cfg
+imx28.cfg stm32w108_stlink.cfg
+imx31.cfg stm32xl.cfg
+imx35.cfg str710.cfg
+imx51.cfg str730.cfg
+imx53.cfg str750.cfg
+imx6.cfg str912.cfg
+imx.cfg swj-dp.tcl
+is5114.cfg test_reset_syntax_error.cfg
+ixp42x.cfg test_syntax_error.cfg
+k40.cfg ti-ar7.cfg
+k60.cfg ti_calypso.cfg
+lpc1751.cfg ti_dm355.cfg
+lpc1752.cfg ti_dm365.cfg
+lpc1754.cfg ti_dm6446.cfg
+lpc1756.cfg tmpa900.cfg
+lpc1758.cfg tmpa910.cfg
+lpc1759.cfg u8500.cfg
@end example
@item @emph{more} ... browse for other library files which may be useful.
For example, there are various generic and CPU-specific utilities.
In summary the board files should contain (if present)
@enumerate
-@item One or more @command{source [target/...cfg]} statements
+@item One or more @command{source [find target/...cfg]} statements
@item NOR flash configuration (@pxref{norconfiguration,,NOR Configuration})
@item NAND flash configuration (@pxref{nandconfiguration,,NAND Configuration})
@item Target @code{reset} handlers for SDRAM and I/O configuration
(@xref{theinittargetsprocedure,,The init_targets procedure}.) - it's a replacement of ``linear''
configuration scripts. This procedure is meant to be executed when OpenOCD enters run stage
(@xref{enteringtherunstage,,Entering the Run Stage},) after @code{init_targets}. The idea to have
-spearate @code{init_targets} and @code{init_board} procedures is to allow the first one to configure
+separate @code{init_targets} and @code{init_board} procedures is to allow the first one to configure
everything target specific (internal flash, internal RAM, etc.) and the second one to configure
everything board specific (reset signals, chip frequency, reset-init event handler, external memory, etc.).
Additionally ``linear'' board config file will most likely fail when target config file uses
@code{init_targets} scheme (``linear'' script is executed before @code{init} and @code{init_targets} - after),
so separating these two configuration stages is very convenient, as the easiest way to overcome this
problem is to convert board config file to use @code{init_board} procedure. Board config scripts don't
-need to override @code{init_targets} defined in target config files when they only need to to add some specifics.
+need to override @code{init_targets} defined in target config files when they only need to add some specifics.
-Just as @code{init_targets}, the @code{init_board} procedure can be overriden by ``next level'' script (which sources
+Just as @code{init_targets}, the @code{init_board} procedure can be overridden by ``next level'' script (which sources
the original), allowing greater code reuse.
@example
use @option{enable} see these errors reported.
@end deffn
+@deffn {Config Command} gdb_target_description (@option{enable}|@option{disable})
+Set to @option{enable} to cause OpenOCD to send the target descriptions to gdb via qXfer:features:read packet.
+The default behaviour is @option{disable}.
+@end deffn
+
+@deffn {Command} gdb_save_tdesc
+Saves the target descripton file to the local file system.
+
+The file name is @i{target_name}.xml.
+@end deffn
+
@anchor{eventpolling}
@section Event Polling
The vendor ID and product ID of the device.
@end deffn
-@deffn {Config Command} {stlink_api} api_level
-Manually sets the stlink api used, valid options are 1 or 2. (@b{STLINK Only}).
+@deffn {Config Command} {trace} source_clock_hz [output_file_path]
+Enable SWO tracing (if supported). The source clock rate for the
+trace port must be specified, this is typically the CPU clock rate. If
+the optional output file is specified then raw trace data is appended
+to the file, and the file is created if it does not exist.
@end deffn
@end deffn
No arguments: print status.
@end deffn
+@deffn {Interface Driver} {bcm2835gpio}
+This SoC is present in Raspberry Pi which is a cheap single-board computer
+exposing some GPIOs on its expansion header.
+
+The driver accesses memory-mapped GPIO peripheral registers directly
+for maximum performance, but the only possible race condition is for
+the pins' modes/muxing (which is highly unlikely), so it should be
+able to coexist nicely with both sysfs bitbanging and various
+peripherals' kernel drivers. The driver restores the previous
+configuration on exit.
+
+See @file{interface/raspberrypi-native.cfg} for a sample config and
+pinout.
+
+@end deffn
+
@section Transport Configuration
@cindex Transport
As noted earlier, depending on the version of OpenOCD you use,
@deffn Command {transport select} transport_name
Select which of the supported transports to use in this OpenOCD session.
The transport must be supported by the debug adapter hardware and by the
-version of OPenOCD you are using (including the adapter's driver).
+version of OpenOCD you are using (including the adapter's driver).
No arguments: returns name of session's selected transport.
@end deffn
@itemize @bullet
@item @b{Debug Target} A CPU TAP can be used as a GDB debug target
-@item @b{Flash Programing} Some chips program the flash directly via JTAG.
+@item @b{Flash Programming} Some chips program the flash directly via JTAG.
Others do it indirectly, making a CPU do it.
@item @b{Program Download} Using the same CPU support GDB uses,
you can initialize a DRAM controller, download code to DRAM, and then
@code{pxa26x} ... instruction register length is 5 bits
@item @code{pxa3xx} ... instruction register length is 11 bits
@end itemize
+@item @code{openrisc} -- this is an OpenRISC 1000 core.
+The current implementation supports three JTAG TAP cores:
+@itemize @minus
+@item @code{OpenCores TAP} (See: @emph{http://opencores.org/project,jtag})
+@item @code{Altera Virtual JTAG TAP} (See: @emph{http://www.altera.com/literature/ug/ug_virtualjtag.pdf})
+@item @code{Xilinx BSCAN_* virtual JTAG interface} (See: @emph{http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/spartan6_hdl.pdf})
+@end itemize
+And two debug interfaces cores:
+@itemize @minus
+@item @code{Advanced debug interface} (See: @emph{http://opencores.org/project,adv_debug_sys})
+@item @code{SoC Debug Interface} (See: @emph{http://opencores.org/project,dbg_interface})
+@end itemize
@end itemize
@end deffn
The value should normally correspond to a static mapping for the
@code{-work-area-phys} address, set up by the current operating system.
+@anchor{rtostype}
@item @code{-rtos} @var{rtos_type} -- enable rtos support for target,
@var{rtos_type} can be one of @option{auto}|@option{eCos}|@option{ThreadX}|
-@option{FreeRTOS}|@option{linux}|@option{ChibiOS}.
+@option{FreeRTOS}|@option{linux}|@option{ChibiOS}|@option{embKernel}
+@xref{gdbrtossupport,,RTOS Support}.
@end itemize
@end deffn
The @var{num} parameter is a value shown by @command{flash banks}.
@end deffn
+@deffn Command {flash padded_value} num value
+Sets the default value used for padding any image sections, This should
+normally match the flash bank erased value. If not specified by this
+comamnd or the flash driver then it defaults to 0xff.
+@end deffn
+
@anchor{program}
@deffn Command {program} filename [verify] [reset] [offset]
This is a helper script that simplifies using OpenOCD as a standalone
@xref{targetevents,,Target Events}.
@end deffn
+@section OpenRISC Architecture
+
+The OpenRISC CPU is a soft core. It is used in a programmable SoC which can be
+configured with any of the TAP / Debug Unit available.
+
+@subsection TAP and Debug Unit selection commands
+@deffn Command {tap_select} (@option{vjtag}|@option{mohor}|@option{xilinx_bscan})
+Select between the Altera Virtual JTAG , Xilinx Virtual JTAG and Mohor TAP.
+@end deffn
+@deffn Command {du_select} (@option{adv}|@option{mohor}) [option]
+Select between the Advanced Debug Interface and the classic one.
+
+An option can be passed as a second argument to the debug unit.
+
+When using the Advanced Debug Interface, option = 1 means the RTL core is
+configured with ADBG_USE_HISPEED = 1. This configuration skips status checking
+between bytes while doing read or write bursts.
+@end deffn
+
+@subsection Registers commands
+@deffn Command {addreg} [name] [address] [feature] [reg_group]
+Add a new register in the cpu register list. This register will be
+included in the generated target descriptor file.
+
+@strong{[feature]} must be "org.gnu.gdb.or1k.group[0..10]".
+
+@strong{[reg_group]} can be anything. The default register list defines "system",
+ "dmmu", "immu", "dcache", "icache", "mac", "debug", "perf", "power", "pic"
+ and "timer" groups.
+
+@emph{example:}
+@example
+addreg rtest 0x1234 org.gnu.gdb.or1k.group0 system
+@end example
+
+
+@end deffn
+@deffn Command {readgroup} (@option{group})
+Display all registers in @emph{group}.
+
+@emph{group} can be "system",
+ "dmmu", "immu", "dcache", "icache", "mac", "debug", "perf", "power", "pic",
+ "timer" or any new group created with addreg command.
+@end deffn
+
@anchor{softwaredebugmessagesandtracing}
@section Software Debug Messages and Tracing
@cindex Linux-ARM DCC support
probably will not be usable with other XSVF tools.
+@node Utility Commands
+@chapter Utility Commands
+@cindex Utility Commands
+
+@section RAM testing
+@cindex RAM testing
+
+There is often a need to stress-test random access memory (RAM) for
+errors. OpenOCD comes with a Tcl implementation of well-known memory
+testing procedures allowing to detect all sorts of issues with
+electrical wiring, defective chips, PCB layout and other common
+hardware problems.
+
+To use them you usually need to initialise your RAM controller first,
+consult your SoC's documentation to get the recommended list of
+register operations and translate them to the corresponding
+@command{mww}/@command{mwb} commands.
+
+Load the memory testing functions with
+
+@example
+source [find tools/memtest.tcl]
+@end example
+
+to get access to the following facilities:
+
+@deffn Command {memTestDataBus} address
+Test the data bus wiring in a memory region by performing a walking
+1's test at a fixed address within that region.
+@end deffn
+
+@deffn Command {memTestAddressBus} baseaddress size
+Perform a walking 1's test on the relevant bits of the address and
+check for aliasing. This test will find single-bit address failures
+such as stuck-high, stuck-low, and shorted pins.
+@end deffn
+
+@deffn Command {memTestDevice} baseaddress size
+Test the integrity of a physical memory device by performing an
+increment/decrement test over the entire region. In the process every
+storage bit in the device is tested as zero and as one.
+@end deffn
+
+@deffn Command {runAllMemTests} baseaddress size
+Run all of the above tests over a specified memory region.
+@end deffn
+
@node TFTP
@chapter TFTP
@cindex TFTP
@end example
@end itemize
+@section RTOS Support
+@cindex RTOS Support
+@anchor{gdbrtossupport}
+
+OpenOCD includes RTOS support, this will however need enabling as it defaults to disabled.
+It can be enabled by passing @option{-rtos} arg to the target @xref{rtostype,,RTOS Type}.
+
+@* An example setup is below:
+
+@example
+$_TARGETNAME configure -rtos auto
+@end example
+
+This will attempt to auto detect the RTOS within your application.
+
+Currently supported rtos's include:
+@itemize @bullet
+@item @option{eCos}
+@item @option{ThreadX}
+@item @option{FreeRTOS}
+@item @option{linux}
+@item @option{ChibiOS}
+@item @option{embKernel}
+@end itemize
+
+@quotation Note
+Before an RTOS can be detected it must export certain symbols otherwise it cannot be used by
+OpenOCD. Below is a list of the required symbols for each supported RTOS.
+@end quotation
+
+@table @code
+@item eCos symbols
+Cyg_Thread::thread_list, Cyg_Scheduler_Base::current_thread.
+@item ThreadX symbols
+_tx_thread_current_ptr, _tx_thread_created_ptr, _tx_thread_created_count.
+@item FreeRTOS symbols
+pxCurrentTCB, pxReadyTasksLists, xDelayedTaskList1, xDelayedTaskList2,
+pxDelayedTaskList, pxOverflowDelayedTaskList, xPendingReadyList,
+xTasksWaitingTermination, xSuspendedTaskList, uxCurrentNumberOfTasks, uxTopUsedPriority.
+@item linux symbols
+init_task.
+@item ChibiOS symbols
+rlist, ch_debug, chSysInit.
+@item embKernel symbols
+Rtos::sCurrentTask, Rtos::sListReady, Rtos::sListSleep,
+Rtos::sListSuspended, Rtos::sMaxPriorities, Rtos::sCurrentTaskCount.
+@end table
+
+For most RTOS supported the above symbols will be exported by default. However for
+some, eg. FreeRTOS @option{xTasksWaitingTermination} is only exported
+if @option{INCLUDE_vTaskDelete} is defined during the build.
@node Tcl Scripting API
@chapter Tcl Scripting API
Code Review / openocd.git / blobdiff