# # Silicon Laboratories SiM3x Cortex-M3 # # SiM3x devices support both JTAG and SWD transports. source [find target/swj-dp.tcl] if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME SiM3x } if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x4ba00477 } if { [info exists CPURAMSIZE] } { set _CPURAMSIZE $CPURAMSIZE } else { # Minimum size of RAM in the Silicon Labs product matrix (8KB) set _CPURAMSIZE 0x2000 } if { [info exists CPUROMSIZE] } { set _CPUROMSIZE $CPUROMSIZE } else { # Minimum size of FLASH in the Silicon Labs product matrix (32KB) set _CPUROMSIZE 0x8000 } if { [info exists WORKAREASIZE] } { set _WORKAREASIZE $WORKAREASIZE } else { set _WORKAREASIZE $_CPURAMSIZE } swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME sim3x 0 $_CPUROMSIZE 0 0 $_TARGETNAME adapter_khz 1000 adapter_nsrst_delay 100 if {[using_jtag]} { jtag_ntrst_delay 100 }