# Renesas R-Car Generation 3 SOCs # - There are a combination of Cortex-A57s, Cortex-A53s, and Cortex-R7 for each Gen3 SOC # - Each SOC can boot through any of the, up to 3, core types that it has # e.g. H3 can boot through Cortex-A57, Cortex-A53, or Cortex-R7 # Supported Gen3 SOCs and their cores: # H3: Cortex-A57 x 4, Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step) # M3W: Cortex-A57 x 2, Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step) # M3N: Cortex-A57 x 2, Cortex-R7 x 2 (Lock-Step) # V3H: Cortex-A53 x 4, Cortex-R7 x 2 (Lock-Step) # V3M: Cortex-A53 x 2, Cortex-R7 x 2 (Lock-Step) # E3: Cortex-A53 x 1, Cortex-R7 x 2 (Lock-Step) # D3: Cortex-A53 x 1 # Usage: # There are 2 configuration options: # SOC: Selects the supported SOC. (Default 'H3') # BOOT_CORE: Selects the booting core. 'CA57', 'CA53', or 'CR7' # Defaults to 'CA57' if the SOC has one, else defaults to 'CA53' if { [info exists SOC] } { set _soc $SOC } else { set _soc H3 } # Set configuration for each SOC and the default 'BOOT_CORE' switch $_soc { H3 { set _CHIPNAME r8a77950 set _num_ca57 4 set _num_ca53 4 set _num_cr7 1 set _boot_core CA57 } M3W { set _CHIPNAME r8a77960 set _num_ca57 2 set _num_ca53 4 set _num_cr7 1 set _boot_core CA57 } M3N { set _CHIPNAME r8a77965 set _num_ca57 2 set _num_ca53 4 set _num_cr7 1 set _boot_core CA57 } V3H { set _CHIPNAME r8a77970 set _num_ca57 0 set _num_ca53 4 set _num_cr7 1 set _boot_core CA53 } V3M { set _CHIPNAME r8a77980 set _num_ca57 0 set _num_ca53 2 set _num_cr7 1 set _boot_core CA53 } E3 { set _CHIPNAME r8a77990 set _num_ca57 0 set _num_ca53 1 set _num_cr7 1 set _boot_core CA53 } D3 { set _CHIPNAME r8a77995 set _num_ca57 0 set _num_ca53 1 set _num_cr7 0 set _boot_core CA53 } default { echo "'$_soc' is invalid!" } } # If configured, override the default 'CHIPNAME' if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } # If configured, override the default 'BOOT_CORE' if { [info exists BOOT_CORE] } { set _boot_core $BOOT_CORE } if { [info exists DAP_TAPID] } { set _DAP_TAPID $DAP_TAPID } else { set _DAP_TAPID 0x5ba00477 } echo "\t$_soc - $_num_ca57 CA57(s), $_num_ca53 CA53(s), $_num_cr7 CR7(s)" echo "\tBoot Core - $_boot_core\n" set _DAPNAME $_CHIPNAME.dap # TAP and DAP jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID dap create $_DAPNAME -chain-position $_CHIPNAME.cpu set CA57_DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000} set CA57_CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000} set CA53_DBGBASE {0x80C10000 0x80D10000 0x80E10000 0x80F10000} set CA53_CTIBASE {0x80C20000 0x80D20000 0x80E20000 0x80F20000} set CR7_DBGBASE 0x80910000 set CR7_CTIBASE 0x80918000 set smp_targets "" proc setup_a5x {core_name dbgbase ctibase num boot} { global _CHIPNAME global _DAPNAME global smp_targets for { set _core 0 } { $_core < $num } { incr _core } { set _TARGETNAME $_CHIPNAME.$core_name.$_core set _CTINAME $_TARGETNAME.cti cti create $_CTINAME -dap $_DAPNAME -ap-num 1 \ -ctibase [lindex $ctibase $_core] set _command "target create $_TARGETNAME aarch64 -dap $_DAPNAME \ -ap-num 1 -dbgbase [lindex $dbgbase $_core] -cti $_CTINAME" if { $_core == 0 && $boot == 1 } { set _targets "$_TARGETNAME" } else { set _command "$_command -defer-examine" } set smp_targets "$smp_targets $_TARGETNAME" eval $_command } } proc setup_cr7 {dbgbase ctibase boot} { global _CHIPNAME global _DAPNAME set _TARGETNAME $_CHIPNAME.r7 set _CTINAME $_TARGETNAME.cti cti create $_CTINAME -dap $_DAPNAME -ap-num 1 -ctibase $ctibase set _command "target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \ -ap-num 1 -dbgbase $dbgbase" if { $boot == 1 } { set _targets "$_TARGETNAME" } else { set _command "$_command -defer-examine" } eval $_command } # Organize target list based on the boot core if { [string equal $_boot_core CA57] } { setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 1 setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0 setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 0 } elseif { [string equal $_boot_core CA53] } { setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 1 setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0 setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 0 } else { setup_cr7 $CR7_DBGBASE $CR7_CTIBASE 1 setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0 setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0 } eval "target smp $smp_targets"