# SPDX-License-Identifier: GPL-2.0-or-later # Texas Instruments OMAP 2420 # http://www.ti.com/omap # as seen in Nokia N8x0 tablets if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME omap2420 } # NOTE: likes slowish clock on reset (1.5 MBit/s or less) or use RCLK reset_config srst_nogate # Subsidiary TAP: ARM7TDMIr4 plus imaging ... must add via ICEpick (addr 6). jtag newtap $_CHIPNAME iva -irlen 4 -disable # Subsidiary TAP: C55x DSP ... must add via ICEpick (addr 2). jtag newtap $_CHIPNAME dsp -irlen 38 -disable # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer if { [info exists ETB_TAPID] } { set _ETB_TAPID $ETB_TAPID } else { set _ETB_TAPID 0x2b900f0f } jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETB_TAPID # Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM. if { [info exists CPU_TAPID] } { set _CPU_TAPID $CPU_TAPID } else { set _CPU_TAPID 0x07b3602f } jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID # Primary TAP: ICEpick-B (JTAG route controller) and boundary scan if { [info exists JRC_TAPID] } { set _JRC_TAPID $JRC_TAPID } else { set _JRC_TAPID 0x01ce4801 } jtag newtap $_CHIPNAME jrc -irlen 2 -expected-id $_JRC_TAPID # GDB target: the ARM. set _TARGETNAME $_CHIPNAME.arm target create $_TARGETNAME arm11 -chain-position $_TARGETNAME # scratch: framebuffer, may be initially unavailable in some chips $_TARGETNAME configure -work-area-phys 0x40210000 $_TARGETNAME configure -work-area-size 0x00081000 $_TARGETNAME configure -work-area-backup 0 # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode etm config $_TARGETNAME 16 normal full etb etb config $_TARGETNAME $_CHIPNAME.etb # RM_RSTCTRL_WKUP.RST.GS - Trigger a global software reset, and # give it a chance to finish before we talk to the chip again. set RM_RSTCTRL_WKUP 0x48008450 $_TARGETNAME configure -event reset-assert \ "halt; $_TARGETNAME mww $RM_RSTCTRL_WKUP 2; sleep 200"