# Avalue RSC-W8910 sbc # http://www.avalue.com.tw/products/RSC-W910.cfm # 2MB NOR Flash # 64MB SDRAM # 128MB NAND Flash # Based on Nuvoton nuc910 source [find target/nuc910.cfg] # # reset only behaves correctly if we use srst_pulls_trst # reset_config trst_and_srst srst_pulls_trst adapter_khz 1000 adapter_nsrst_delay 100 jtag_ntrst_delay 100 $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x04000000 -work-area-backup 0 set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME cfi 0x20000000 0x00200000 2 2 $_TARGETNAME set _NANDNAME $_CHIPNAME.nand nand device $_NANDNAME nuc910 $_TARGETNAME # # Target events # $_TARGETNAME configure -event reset-start {adapter_khz 1000} $_TARGETNAME configure -event reset-init { # switch on PLL for 200MHz operation # running from 15MHz input clock mww 0xB0000200 0x00000030 ;# CLKEN mww 0xB0000204 0x00000f3c ;# CLKSEL mww 0xB0000208 0x05007000 ;# CLKDIV mww 0xB000020C 0x00004f24 ;# PLLCON0 mww 0xB0000210 0x00002b63 ;# PLLCON1 mww 0xB000000C 0x08817fa6 ;# MFSEL sleep 10 # we are now running @ 200MHz # enable all openocd speed tweaks arm7_9 dcc_downloads enable arm7_9 fast_memory_access enable adapter_khz 15000 # map nor flash to 0x20000000 # map sdram to 0x00000000 mww 0xb0001000 0x000530c1 ;# EBICON mww 0xb0001004 0x40030084 ;# ROMCON mww 0xb0001008 0x000010ee ;# SDCONF0 mww 0xb000100C 0x00000000 ;# SDCONF1 mww 0xb0001010 0x0000015b ;# SDTIME0 mww 0xb0001014 0x0000015b ;# SDTIME1 mww 0xb0001018 0x00000000 ;# EXT0CON mww 0xb000101C 0x00000000 ;# EXT1CON mww 0xb0001020 0x00000000 ;# EXT2CON mww 0xb0001024 0x00000000 ;# EXT3CON mww 0xb000102c 0x00ff0048 ;# CKSKEW }