testing/results/v0.4.0-rc1/STR710.html

   1 <html>
   2 <head>
   3 <title>Test results for version 1.62</title>
   4 </head>
   5
   6 <body>
   7
   8 <H1>STR710</H1>
   9
  10 <H2>Connectivity</H2>
  11 <table border=1>
  12         <tr>
  13                 <td>ID</td>
  14                 <td>Target</td>
  15                 <td>Interface</td>
  16                 <td>Description</td>
  17                 <td>Initial state</td>
  18                 <td>Input</td>
  19                 <td>Expected output</td>
  20                 <td>Actual output</td>
  21                 <td>Pass/Fail</td>
  22         </tr>
  23         <tr>
  24                 <td><a name="CON001"/>CON001</td>
  25                 <td>STR912</td>
  26                 <td>ZY1000</td>
  27                 <td>Telnet connection</td>
  28                 <td>Power on, jtag target attached</td>
  29                 <td>On console, type<br><code>telnet ip port</code></td>
  30                 <td><code>Open On-Chip Debugger<br>></code></td>
  31                 <td><code>> telnet 10.0.0.142<br>
  32                                         Trying 10.0.0.142...<br>
  33                                         Connected to 10.0.0.142.<br>
  34                                         Escape character is '^]'.<br>
  35                                         Open On-Chip Debugger<br>
  36                                         >
  37 </code></td>
  38                 <td>PASS</td>
  39         </tr>
  40         <tr>
  41                 <td><a name="CON002"/>CON002</td>
  42                 <td>STR912</td>
  43                 <td>ZY1000</td>
  44                 <td>GDB server connection</td>
  45                 <td>Power on, jtag target attached</td>
  46                 <td>On GDB console, type<br><code>target remote ip:port</code></td>
  47                 <td><code>Remote debugging using 10.0.0.73:3333</code></td>
  48                 <td><code>
  49                         (gdb) tar remo 10.0.0.142:3333<br>
  50                         Remote debugging using 10.0.0.142:3333<br>
  51                         0x00016434 in ?? ()<br>
  52                         (gdb)
  53                 </code></td>
  54                 <td>PASS</td>
  55         </tr>
  56 </table>
  57
  58 <H2>Reset</H2>
  59 <table border=1>
  60         <tr>
  61                 <td>ID</td>
  62                 <td>Target</td>
  63                 <td>Interface</td>
  64                 <td>Description</td>
  65                 <td>Initial state</td>
  66                 <td>Input</td>
  67                 <td>Expected output</td>
  68                 <td>Actual output</td>
  69                 <td>Pass/Fail</td>
  70         </tr>
  71         <tr>
  72                 <td><a name="RES001"/>RES001</td>
  73                 <td>STR912</td>
  74                 <td>ZY1000</td>
  75                 <td>Reset halt on a blank target</td>
  76                 <td>Erase all the content of the flash</td>
  77                 <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
  78                 <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
  79                 <td>
  80                         <code>
  81 > mdw 0 32<br>
  82 0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e<br>
  83 0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292<br>
  84 0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18<br>
  85 0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8<br>
  86 > reset<br>
  87 jtag_speed 6400 => JTAG clk=0.010000<br>
  88 10 kHz<br>
  89 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
  90 ><br>
  91                         </code>
  92                 </td>
  93                 <td>PASS</td>
  94         </tr>
  95         <tr>
  96                 <td><a name="RES002"/>RES002</td>
  97                 <td>STR912</td>
  98                 <td>ZY1000</td>
  99                 <td>Reset init on a blank target</td>
 100                 <td>Erase all the content of the flash</td>
 101                 <td>Connect via the telnet interface and type <br><code>reset init</code></td>
 102                 <td>Reset should return without error and the output should contain <br><code>executing reset script 'name_of_the_script'</code></td>
 103                 <td>
 104                         <code>
 105 > reset init<br>
 106 jtag_speed 6400 => JTAG clk=0.010000<br>
 107 10 kHz<br>
 108 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
 109 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 110 target state: halted<br>
 111 target halted in ARM state due to debug-request, current mode: Undefined instruction<br>
 112 cpsr: 0xf00000db pc: 0x00000004<br>
 113 jtag_speed 10 => JTAG clk=6.400000<br>
 114 6400 kHz
 115                         </code>
 116                 </td>
 117                 <td>PASS</td>
 118         </tr>
 119         <tr>
 120                 <td><a name="RES003"/>RES003</td>
 121                 <td>STR912</td>
 122                 <td>ZY1000</td>
 123                 <td>Reset after a power cycle of the target</td>
 124                 <td>Reset the target then power cycle the target</td>
 125                 <td>Connect via the telnet interface and type <br><code>reset halt</code> after the power was detected</td>
 126                 <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
 127                 <td>
 128                         <code>
 129   nsed power dropout.<br>
 130   nsed power dropout.<br>
 131   nsed nSRST deasserted.<br>
 132   invalid mode value encountered 0<br>
 133 cpsr contains invalid mode value - communication failure<br>
 134 jtag_speed 6400 => JTAG clk=0.010000<br>
 135 10 kHz<br>
 136 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
 137 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 138 target state: halted<br>
 139 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 140 cpsr: 0x100000d3 pc: 0x0000001c<br>
 141 jtag_speed 10 => JTAG clk=6.400000<br>
 142 6400 kHz<br>
 143   nsed power restore.<br>
 144 jtag_speed 6400 => JTAG clk=0.010000<br>
 145 10 kHz<br>
 146 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
 147 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 148 target state: halted<br>
 149 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 150 cpsr: 0x500000d3 pc: 0x00000000<br>
 151 jtag_speed 10 => JTAG clk=6.400000<br>
 152 6400 kHz<br>
 153 > reset init<br>
 154 jtag_speed 6400 => JTAG clk=0.010000<br>
 155 10 kHz<br>
 156 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
 157 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 158 target state: halted<br>
 159 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 160 cpsr: 0x500000d3 pc: 0x00000000<br>
 161 jtag_speed 10 => JTAG clk=6.400000<br>
 162 6400 kHz<br>
 163 >
 164                         </code>
 165                 </td>
 166                 <td>PASS</td>
 167         </tr>
 168         <tr>
 169                 <td><a name="RES004"/>RES004</td>
 170                 <td>STR912</td>
 171                 <td>ZY1000</td>
 172                 <td>Reset halt on a blank target where reset halt is supported</td>
 173                 <td>Erase all the content of the flash</td>
 174                 <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
 175                 <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
 176                 <td>
 177                         <code>
 178 > reset halt<br>
 179 jtag_speed 6400 => JTAG clk=0.010000<br>
 180 10 kHz<br>
 181 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
 182 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 183 target state: halted<br>
 184 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 185 cpsr: 0x200000d3 pc: 0xfe50cba4<br>
 186 >
 187 </code>
 188                 </td>
 189                 <td>PASS</td>
 190         </tr>
 191         <tr>
 192                 <td><a name="RES005"/>RES005</td>
 193                 <td>STR912</td>
 194                 <td>ZY1000</td>
 195                 <td>Reset halt on a blank target using return clock</td>
 196                 <td>Erase all the content of the flash, set the configuration script to use RCLK</td>
 197                 <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
 198                 <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
 199                 <td>
 200                         <code>
 201                         > jtag_khz 0<br>
 202 RCLK - adaptive<br>
 203 RCLK timeout<br>
 204 RCLK timeout<br>
 205 RCLK timeout<br>
 206                         > reset halt<br>
 207  RCLK timeout<br>
 208 jtag_speed 6400 => JTAG clk=0.010000<br>
 209 10 kHz<br>
 210 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
 211 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 212 target state: halted<br>
 213 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 214 cpsr: 0x200000d3 pc: 0xfe50cb50<br>
 215                         </code>
 216                 </td>
 217                 <td><font color=red><b>FAIL</b></font></td>
 218         </tr>
 219 </table>
 220
 221 <H2>JTAG Speed</H2>
 222 <table border=1>
 223         <tr>
 224                 <td>ID</td>
 225                 <td>Target</td>
 226                 <td>ZY1000</td>
 227                 <td>Description</td>
 228                 <td>Initial state</td>
 229                 <td>Input</td>
 230                 <td>Expected output</td>
 231                 <td>Actual output</td>
 232                 <td>Pass/Fail</td>
 233         </tr>
 234         <tr>
 235                 <td><a name="SPD001"/>SPD001</td>
 236                 <td>STR912</td>
 237                 <td>ZY1000</td>
 238                 <td>16MHz on normal operation</td>
 239                 <td>Reset init the target according to RES002 </td>
 240                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 241                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 242                 <td>
 243                         <code>
 244 > jtag_khz 16000<br>
 245 jtag_speed 4 => JTAG clk=16.000000<br>
 246 16000 kHz<br>
 247 > mdw 0 32<br>
 248 0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e<br>
 249 0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292<br>
 250 0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18<br>
 251 0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8<br>
 252 >
 253                         </code>
 254                 </td>
 255                 <td>PASS</td>
 256         </tr>
 257         <tr>
 258                 <td><a name="SPD002"/>SPD002</td>
 259                 <td>STR912</td>
 260                 <td>ZY1000</td>
 261                 <td>8MHz on normal operation</td>
 262                 <td>Reset init the target according to RES002 </td>
 263                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 264                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 265                 <td>
 266                         <code>
 267 > jtag_khz 8000<br>
 268 jtag_speed 8 => JTAG clk=8.000000<br>
 269 8000 kHz<br>
 270 > mdw 0 32<br>
 271 0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e<br>
 272 0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292<br>
 273 0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18<br>
 274 0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8<br>
 275 >
 276                         </code>
 277                 </td>
 278                 <td>PASS</td>
 279         </tr>
 280         <tr>
 281                 <td><a name="SPD003"/>SPD003</td>
 282                 <td>STR912</td>
 283                 <td>ZY1000</td>
 284                 <td>4MHz on normal operation</td>
 285                 <td>Reset init the target according to RES002 </td>
 286                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 287                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 288                 <td>
 289                         <code>
 290 > jtag_khz 4000<br>
 291 jtag_speed 16 => JTAG clk=4.000000<br>
 292 4000 kHz<br>
 293 > mdw 0 32<br>
 294 0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e<br>
 295 0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292<br>
 296 0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18<br>
 297 0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8<br>
 298 >
 299                         </code>
 300                 </td>
 301                 <td>PASS</td>
 302         </tr>
 303         <tr>
 304                 <td><a name="SPD004"/>SPD004</td>
 305                 <td>STR912</td>
 306                 <td>ZY1000</td>
 307                 <td>2MHz on normal operation</td>
 308                 <td>Reset init the target according to RES002 </td>
 309                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 310                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 311                 <td>
 312                         <code>
 313 > > jtag_khz 2000<br>
 314 jtag_speed 32 => JTAG clk=2.000000<br>
 315 2000 kHz<br>
 316 > mdw 0 32<br>
 317 0x00000000: 75755000 8a930104 65696f65 939a3e98 214751f1 fa0edb9b 6664686d 931a989e<br>
 318 0x00000020: 676c65e4 9a0a0982 25653445 da02ba90 c4ed3165 9b9a8a9a 65676365 01981292<br>
 319 0x00000040: 212e0982 82ba3f8b 34674765 96ba1a9a 6175e7e5 9b9ab91a 0789644d 120a9a18<br>
 320 0x00000060: 65446167 80d20982 6d6d6565 187090ca 65277d65 9a9a0b81 6960416c 9ffe88b8<br>
 321 >
 322                         </code>
 323                 </td>
 324                 <td>PASS</td>
 325         </tr>
 326         <tr>
 327                 <td><a name="SPD005"/>SPD005</td>
 328                 <td>STR912</td>
 329                 <td>ZY1000</td>
 330                 <td>RCLK on normal operation</td>
 331                 <td>Reset init the target according to RES002 </td>
 332                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 333                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 334                 <td>
 335                         <code>
 336 > jtag_khz 0<br>
 337 RCLK - adaptive<br>
 338 RCLK timeout<br>
 339 RCLK timeout<br>
 340 RCLK timeout
 341                         </code>
 342                 </td>
 343                 <td><font color=red><b>FAIL</b></font></td>
 344         </tr>
 345 </table>
 346
 347 <H2>Debugging</H2>
 348 <table border=1>
 349         <tr>
 350                 <td>ID</td>
 351                 <td>Target</td>
 352                 <td>Interface</td>
 353                 <td>Description</td>
 354                 <td>Initial state</td>
 355                 <td>Input</td>
 356                 <td>Expected output</td>
 357                 <td>Actual output</td>
 358                 <td>Pass/Fail</td>
 359         </tr>
 360         <tr>
 361                 <td><a name="DBG001"/>DBG001</td>
 362                 <td>STR912</td>
 363                 <td>ZY1000</td>
 364                 <td>Load is working</td>
 365                 <td>Reset init is working, RAM is accesible, GDB server is started</td>
 366                 <td>On the console of the OS: <br>
 367                         <code>arm-elf-gdb test_ram.elf</code><br>
 368                         <code>(gdb) target remote ip:port</code><br>
 369                         <code>(gdb) load</load>
 370                 </td>
 371                 <td>Load should return without error, typical output looks like:<br>
 372                         <code>
 373                                 Loading section .text, size 0x14c lma 0x0<br>
 374                                 Start address 0x40, load size 332<br>
 375                                 Transfer rate: 180 bytes/sec, 332 bytes/write.<br>
 376                         </code>
 377                 </td>
 378                 <td><code>
 379 (gdb) load<br>
 380 Loading section .text, size 0x1cc lma 0x20000000<br>
 381 Loading section .vectors, size 0x40 lma 0x200001cc<br>
 382 Loading section .rodata, size 0x4 lma 0x2000020c<br>
 383 Start address 0x20000000, load size 528<br>
 384 Transfer rate: 64 KB/sec, 176 bytes/write.<br>
 385 (gdb)
 386                 </code></td>
 387                 <td>PASS</td>
 388         </tr>
 389
 390         <tr>
 391                 <td><a name="DBG002"/>DBG002</td>
 392                 <td>STR912</td>
 393                 <td>ZY1000</td>
 394                 <td>Software breakpoint</td>
 395                 <td>Load the test_ram.elf application, use instructions from GDB001</td>
 396                 <td>In the GDB console:<br>
 397                         <code>
 398                                 (gdb) monitor gdb_breakpoint_override soft<br>
 399                                 force soft breakpoints<br>
 400                                 (gdb) break main<br>
 401                                 Breakpoint 1 at 0xec: file src/main.c, line 71.<br>
 402                                 (gdb) continue<br>
 403                                 Continuing.
 404                         </code>
 405                 </td>
 406                 <td>The software breakpoint should be reached, a typical output looks like:<br>
 407                         <code>
 408                                 target state: halted<br>
 409                                 target halted in ARM state due to breakpoint, current mode: Supervisor<br>
 410                                 cpsr: 0x000000d3 pc: 0x000000ec<br>
 411                                 <br>
 412                                 Breakpoint 1, main () at src/main.c:71<br>
 413                                 71        DWORD a = 1;
 414                         </code>
 415                 </td>
 416                 <td>
 417                         <code>
 418 (gdb) monitor gdb_breakpoint_override soft<br>
 419 force soft breakpoints<br>
 420 Current language:  auto<br>
 421 The current source language is "auto; currently asm".<br>
 422 (gdb) break main<br>
 423 Breakpoint 1 at 0x20000170: file src/main.c, line 69.<br>
 424 (gdb) c<br>
 425 Continuing.<br>
 426 <br>
 427 Breakpoint 1, main () at src/main.c:69<br>
 428 69        DWORD a = 1;<br>
 429 Current language:  auto<br>
 430 The current source language is "auto; currently c".<br>
 431 (gdb)
 432                         </code>
 433                 </td>
 434                 <td>PASS</td>
 435         </tr>
 436         <tr>
 437                 <td><a name="DBG003"/>DBG003</td>
 438                 <td>STR912</td>
 439                 <td>ZY1000</td>
 440                 <td>Single step in a RAM application</td>
 441                 <td>Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002</td>
 442                 <td>In GDB, type <br><code>(gdb) step</code></td>
 443                 <td>The next instruction should be reached, typical output:<br>
 444                         <code>
 445                                 (gdb) step<br>
 446                                 target state: halted<br>
 447                                 target halted in ARM state due to single step, current mode: Abort<br>
 448                                 cpsr: 0x20000097 pc: 0x000000f0<br>
 449                                 target state: halted<br>
 450                                 target halted in ARM state due to single step, current mode: Abort<br>
 451                                 cpsr: 0x20000097 pc: 0x000000f4<br>
 452                                 72        DWORD b = 2;
 453                         </code>
 454                 </td>
 455                 <td>
 456                         <code>
 457                                 (gdb) step<br>
 458                                 70        DWORD b = 2;<br>
 459                                 (gdb)
 460                         </code>
 461                 </td>
 462                 <td>PASS</td>
 463         </tr>
 464         <tr>
 465                 <td><a name="DBG004"/>DBG004</td>
 466                 <td>STR912</td>
 467                 <td>ZY1000</td>
 468                 <td>Software break points are working after a reset</td>
 469                 <td>Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002</td>
 470                 <td>In GDB, type <br><code>
 471                         (gdb) monitor reset init<br>
 472                         (gdb) load<br>
 473                         (gdb) continue<br>
 474                         </code></td>
 475                 <td>The breakpoint should be reached, typical output:<br>
 476                         <code>
 477                                 target state: halted<br>
 478                                 target halted in ARM state due to breakpoint, current mode: Supervisor<br>
 479                                 cpsr: 0x000000d3 pc: 0x000000ec<br>
 480                                 <br>
 481                                 Breakpoint 1, main () at src/main.c:71<br>
 482                                 71        DWORD a = 1;
 483                         </code>
 484                 </td>
 485                 <td><code>
 486 ((gdb) monitor reset init<br>
 487 jtag_speed 6400 => JTAG clk=0.010000<br>
 488 10 kHz<br>
 489 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
 490 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 491 target state: halted<br>
 492 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 493 cpsr: 0x60000013 pc: 0x200001bc<br>
 494 jtag_speed 10 => JTAG clk=6.400000<br>
 495 6400 kHz<br>
 496 (gdb) load<br>
 497 Loading section .text, size 0x1cc lma 0x20000000<br>
 498 Loading section .vectors, size 0x40 lma 0x200001cc<br>
 499 Loading section .rodata, size 0x4 lma 0x2000020c<br>
 500 Start address 0x20000000, load size 528<br>
 501 Transfer rate: 64 KB/sec, 176 bytes/write.<br>
 502 (gdb) c<br>
 503 Continuing.<br>
 504 <br>
 505 Breakpoint 1, main () at src/main.c:69<br>
 506 69        DWORD a = 1;<br>
 507 (gdb)
 508                 </code></td>
 509                 <td>PASS</td>
 510         </tr>
 511         <tr>
 512                 <td><a name="DBG005"/>DBG005</td>
 513                 <td>STR912</td>
 514                 <td>ZY1000</td>
 515                 <td>Hardware breakpoint</td>
 516                 <td>Flash the test_rom.elf application. Make this test after FLA004 has passed</td>
 517                 <td>Be sure that <code>gdb_memory_map</code> and <code>gdb_flash_program</code> are enabled. In GDB, type <br>
 518                         <code>
 519                                 (gdb) monitor reset init<br>
 520                                 (gdb) load<br>
 521                                 Loading section .text, size 0x194 lma 0x100000<br>
 522                                 Start address 0x100040, load size 404<br>
 523                                 Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
 524                                 (gdb) monitor gdb_breakpoint_override hard<br>
 525                                 force hard breakpoints<br>
 526                                 (gdb) break main<br>
 527                                 Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
 528                                 (gdb) continue<br>
 529                         </code>
 530                 </td>
 531                 <td>The breakpoint should be reached, typical output:<br>
 532                         <code>
 533                                 Continuing.<br>
 534                                 <br>
 535                                 Breakpoint 1, main () at src/main.c:69<br>
 536                                 69        DWORD a = 1;<br>
 537                         </code>
 538                 </td>
 539                 <td>
 540                 <code>
 541 (gdb) monitor gdb_breakpoint_override hard<br>
 542 force hard breakpoints<br>
 543 (gdb) break main<br>
 544 Breakpoint 1 at 0x40000170: file src/main.c, line 69.<br>
 545 (gdb) c<br>
 546 Continuing.<br>
 547 Note: automatically using hardware breakpoints for read-only addresses.<br>
 548 <br>
 549 Breakpoint 1, main () at src/main.c:69<br>
 550 69        DWORD a = 1;<br>
 551 Current language:  auto<br>
 552 The current source language is "auto; currently c".<br>
 553 (gdb)
 554                 </code>
 555                 </td>
 556                 <td>PASS</td>
 557         </tr>
 558         <tr>
 559                 <td><a name="DBG006"/>DBG006</td>
 560                 <td>STR912</td>
 561                 <td>ZY1000</td>
 562                 <td>Hardware breakpoint is set after a reset</td>
 563                 <td>Follow the instructions to flash and insert a hardware breakpoint from DBG005</td>
 564                 <td>In GDB, type <br>
 565                         <code>
 566                                 (gdb) monitor reset<br>
 567                                 (gdb) monitor reg pc 0x100000<br>
 568                                 pc (/32): 0x00100000<br>
 569                                 (gdb) continue
 570                         </code><br>
 571                         where the value inserted in PC is the start address of the application
 572                 </td>
 573                 <td>The breakpoint should be reached, typical output:<br>
 574                         <code>
 575                                 Continuing.<br>
 576                                 <br>
 577                                 Breakpoint 1, main () at src/main.c:69<br>
 578                                 69        DWORD a = 1;<br>
 579                         </code>
 580                 </td>
 581                 <td>
 582                 <code>
 583 (gdb) monitor reset init<br>
 584 jtag_speed 6400 => JTAG clk=0.010000<br>
 585 10 kHz<br>
 586 JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)<br>
 587 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 588 target state: halted<br>
 589 target halted in ARM state due to debug-request, current mode: Undefined instruction<br>
 590 cpsr: 0x400000db pc: 0x010aea80<br>
 591 jtag_speed 10 => JTAG clk=6.400000<br>
 592 6400 kHz<br>
 593 (gdb) monitor reg pc 0x40000000<br>
 594 pc (/32): 0x40000000<br>
 595 (gdb) c<br>
 596 Continuing.<br>
 597 <br>
 598 Breakpoint 1, main () at src/main.c:69<br>
 599 69        DWORD a = 1;<br>
 600 Current language:  auto<br>
 601 The current source language is "auto; currently c".<br>
 602 (gdb)
 603                 </code>
 604                 </td>
 605                 <td>PASS</td>
 606         </tr>
 607         <tr>
 608                 <td><a name="DBG007"/>DBG007</td>
 609                 <td>STR912</td>
 610                 <td>ZY1000</td>
 611                 <td>Single step in ROM</td>
 612                 <td>Flash the test_rom.elf application and set a breakpoint in main, use DBG005. Make this test after FLA004 has passed</td>
 613                 <td>Be sure that <code>gdb_memory_map</code> and <code>gdb_flash_program</code> are enabled. In GDB, type <br>
 614                         <code>
 615                                 (gdb) monitor reset<br>
 616                                 (gdb) load<br>
 617                                 Loading section .text, size 0x194 lma 0x100000<br>
 618                                 Start address 0x100040, load size 404<br>
 619                                 Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
 620                                 (gdb) monitor arm7_9  force_hw_bkpts enable<br>
 621                                 force hardware breakpoints enabled<br>
 622                                 (gdb) break main<br>
 623                                 Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
 624                                 (gdb) continue<br>
 625                                 Continuing.<br>
 626                                 <br>
 627                                 Breakpoint 1, main () at src/main.c:69<br>
 628                                 69        DWORD a = 1;<br>
 629                                 (gdb) step
 630                         </code>
 631                 </td>
 632                 <td>The breakpoint should be reached, typical output:<br>
 633                         <code>
 634                                 target state: halted<br>
 635                                 target halted in ARM state due to single step, current mode: Supervisor<br>
 636                                 cpsr: 0x60000013 pc: 0x0010013c<br>
 637                                 70        DWORD b = 2;<br>
 638                         </code>
 639                 </td>
 640                 <td><code>
 641 Breakpoint 2, main () at src/main.c:69<br>
 642 69        DWORD a = 1;<br>
 643 Current language:  auto<br>
 644 The current source language is "auto; currently c".<br>
 645 (gdb) step<br>
 646 70        DWORD b = 2;<br>
 647 (gdb)
 648                 </code></td>
 649                 <td>PASS</td>
 650         </tr>
 651 </table>
 652
 653 <H2>RAM access</H2>
 654 Note: these tests are not designed to test/debug the target, but to test functionalities!
 655 <table border=1>
 656         <tr>
 657                 <td>ID</td>
 658                 <td>Target</td>
 659                 <td>Interface</td>
 660                 <td>Description</td>
 661                 <td>Initial state</td>
 662                 <td>Input</td>
 663                 <td>Expected output</td>
 664                 <td>Actual output</td>
 665                 <td>Pass/Fail</td>
 666         </tr>
 667         <tr>
 668                 <td><a name="RAM001"/>RAM001</td>
 669                 <td>STR912</td>
 670                 <td>ZY1000</td>
 671                 <td>32 bit Write/read RAM</td>
 672                 <td>Reset init is working</td>
 673                 <td>On the telnet interface<br>
 674                         <code>  > mww ram_address 0xdeadbeef 16<br>
 675                                         > mdw ram_address 32
 676                         </code>
 677                 </td>
 678                 <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 32bit long containing 0xdeadbeef.<br>
 679                         <code>
 680                                 > mww 0x0 0xdeadbeef 16<br>
 681                                 > mdw 0x0 32<br>
 682                                 0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 683                                 0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 684                                 0x00000040: e1a00000 e59fa51c e59f051c e04aa000 00080017 00009388 00009388 00009388<br>
 685                                 0x00000060: 00009388 0002c2c0 0002c2c0 000094f8 000094f4 00009388 00009388 00009388<br>
 686                         </code>
 687                 </td>
 688                 <td><code>
 689 > mww 0x20000000 0xdeadbeef 16<br>
 690 > mdw 0x20000000 32<br>
 691 0x20000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 692 0x20000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 693 0x20000040: e3a0020a e3a01073 e5801018 e5901008 e3110002 0afffffc e3a0020a e59f10d0<br>
 694 0x20000060: e5801008 e321f0db e59fd0c8 e321f0d7 e59fd0c4 e321f0d1 e59fd0c0 e321f0d2<br>
 695 >
 696 </code></td>
 697                 <td>PASS</td>
 698         </tr>
 699         <tr>
 700                 <td><a name="RAM002"/>RAM002</td>
 701                 <td>STR912</td>
 702                 <td>ZY1000</td>
 703                 <td>16 bit Write/read RAM</td>
 704                 <td>Reset init is working</td>
 705                 <td>On the telnet interface<br>
 706                         <code>  > mwh ram_address 0xbeef 16<br>
 707                                         > mdh ram_address 32
 708                         </code>
 709                 </td>
 710                 <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 16bit long containing 0xbeef.<br>
 711                         <code>
 712                                 > mwh 0x0 0xbeef 16<br>
 713                                 > mdh 0x0 32<br>
 714                                 0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef<br>
 715                                 0x00000020: 00e0 0000 021c 0000 0240 0000 026c 0000 0288 0000 0000 0000 0388 0000 0350 0000<br>
 716                                 >
 717                         </code>
 718                 </td>
 719                 <td><code>
 720 > mwh 0x20000000 0xbeef 16<br>
 721 > mdh 0x20000000 32<br>
 722 0x20000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef<br>
 723 0x20000020: beef dead beef dead beef dead beef dead beef dead beef dead beef dead beef dead<br>
 724 >
 725                 </code></td>
 726                 <td>PASS</td>
 727         </tr>
 728         <tr>
 729                 <td><a name="RAM003"/>RAM003</td>
 730                 <td>STR912</td>
 731                 <td>ZY1000</td>
 732                 <td>8 bit Write/read RAM</td>
 733                 <td>Reset init is working</td>
 734                 <td>On the telnet interface<br>
 735                         <code>  > mwb ram_address 0xab 16<br>
 736                                         > mdb ram_address 32
 737                         </code>
 738                 </td>
 739                 <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 8bit long containing 0xab.<br>
 740                         <code>
 741                                 > mwb ram_address 0xab 16<br>
 742                                 > mdb ram_address 32<br>
 743                                 0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>
 744                                 >
 745                         </code>
 746                 </td>
 747                 <td><code>
 748 > mwb 0x20000000 0xab 16<br>
 749 > mdb 0x20000000 32<br>
 750 0x20000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ef be ef be ef be ef be ef be ef be ef be ef be<br>
 751 >
 752                 </code></td>
 753                 <td>PASS</td>
 754         </tr>
 755 </table>
 756
 757
 758
 759 <H2>Flash access</H2>
 760 <table border=1>
 761         <tr>
 762                 <td>ID</td>
 763                 <td>Target</td>
 764                 <td>Interface</td>
 765                 <td>Description</td>
 766                 <td>Initial state</td>
 767                 <td>Input</td>
 768                 <td>Expected output</td>
 769                 <td>Actual output</td>
 770                 <td>Pass/Fail</td>
 771         </tr>
 772         <tr>
 773                 <td><a name="FLA001"/>FLA001</td>
 774                 <td>STR912</td>
 775                 <td>ZY1000</td>
 776                 <td>Flash probe</td>
 777                 <td>Reset init is working</td>
 778                 <td>On the telnet interface:<br>
 779                         <code>  > flash probe 0</code>
 780                 </td>
 781                 <td>The command should execute without error. The output should state the name of the flash and the starting address. An example of output:<br>
 782                         <code>flash 'ecosflash' found at 0x01000000</code>
 783                 </td>
 784                 <td>
 785                 <code>
 786                         > flash probe 0<br>
 787                         flash 'str7x' found at 0x40000000<br>
 788                         >
 789                 </code>
 790                 </td>
 791                 <td>PASS</td>
 792         </tr>
 793         <tr>
 794                 <td><a name="FLA002"/>FLA002</td>
 795                 <td>STR912</td>
 796                 <td>ZY1000</td>
 797                 <td>flash fillw</td>
 798                 <td>Reset init is working, flash is probed</td>
 799                 <td>On the telnet interface<br>
 800                         <code>  > flash fillw 0x1000000 0xdeadbeef 16
 801                         </code>
 802                 </td>
 803                 <td>The commands should execute without error. The output looks like:<br>
 804                         <code>
 805                                 wrote 64 bytes to 0x01000000 in 11.610000s (0.091516 kb/s)
 806                         </code><br>
 807                         To verify the contents of the flash:<br>
 808                         <code>
 809                                 > mdw 0x1000000 32<br>
 810                                 0x01000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 811                                 0x01000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 812                                 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 813                                 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
 814                         </code>
 815                 </td>
 816                 <td><code>
 817                                 > flash fillw 0x40000000 0xdeadbeef 16<br>
 818                                 wrote 64 bytes to 0x40000000 in 0.000000s (inf kb/s)<br>
 819                                 > mdw 0x40000000 32<br>
 820                                 0x40000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 821                                 0x40000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 822                                 0x40000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 823                                 0x40000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 824                                 >
 825                         </code></td>
 826                 <td>PASS</td>
 827         </tr>
 828         <tr>
 829                 <td><a name="FLA003"/>FLA003</td>
 830                 <td>STR912</td>
 831                 <td>ZY1000</td>
 832                 <td>Flash erase</td>
 833                 <td>Reset init is working, flash is probed</td>
 834                 <td>On the telnet interface<br>
 835                         <code>  >  flash erase_address 0x1000000 0x2000
 836                         </code>
 837                 </td>
 838                 <td>The commands should execute without error.<br>
 839                         <code>
 840                                 erased address 0x01000000 length 8192 in 4.970000s
 841                         </code>
 842                         To check that the flash has been erased, read at different addresses. The result should always be 0xff.
 843                         <code>
 844                                 > mdw 0x1000000 32<br>
 845                                 0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 846                                 0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 847                                 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 848                                 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
 849                         </code>
 850                 </td>
 851                 <td><code>
 852 > flash erase_address 0x40000000 0x2000<br>
 853 erased address 0x40000000 (length 8192) in 0.270000s (29.630 kb/s)<br>
 854 > mdw 0x40000000 32                    <br>
 855 0x40000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 856 0x40000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 857 0x40000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 858 0x40000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 859 >
 860 </code></td>
 861                 <td>PASS</td>
 862         </tr>
 863         <tr>
 864                 <td><a name="FLA004"/>FLA004</td>
 865                 <td>STR912</td>
 866                 <td>ZY1000</td>
 867                 <td>Loading to flash from GDB</td>
 868                 <td>Reset init is working, flash is probed, connectivity to GDB server is working</td>
 869                 <td>Start GDB using a ROM elf image, eg: arm-elf-gdb test_rom.elf. <br>
 870                                 <code>
 871                                         (gdb) target remote ip:port<br>
 872                                         (gdb) monitor reset<br>
 873                                         (gdb) load<br>
 874                                         Loading section .text, size 0x194 lma 0x100000<br>
 875                                         Start address 0x100040, load size 404<br>
 876                                         Transfer rate: 179 bytes/sec, 404 bytes/write.
 877                                         (gdb) monitor verify_image path_to_elf_file
 878                                 </code>
 879                 </td>
 880                 <td>The output should look like:<br>
 881                         <code>
 882                                 verified 404 bytes in 5.060000s
 883                         </code><br>
 884                         The failure message is something like:<br>
 885                         <code>Verify operation failed address 0x00200000. Was 0x00 instead of 0x18</code>
 886                 </td>
 887                 <td>
 888                         <code>
 889 (gdb) load<br>
 890 Loading section .text, size 0x1cc lma 0x40000000<br>
 891 Loading section .vectors, size 0x40 lma 0x400001cc<br>
 892 Loading section .rodata, size 0x4 lma 0x4000020c<br>
 893 Start address 0x40000000, load size 528<br>
 894 Transfer rate: 53 bytes/sec, 176 bytes/write.<br>
 895 (gdb) monitor verify_image /tftp/10.0.0.194/test_rom.elf<br>
 896 verified 528 bytes in 4.760000s (0.108 kb/s)<br>
 897 Current language:  auto<br>
 898 The current source language is "auto; currently asm".<br>
 899 (gdb)
 900                         </code>
 901                 </td>
 902                 <td>PASS</td>
 903         </tr>
 904 </table>
 905
 906 </body>
 907 </html>