testing/results/v0.4.0-rc1/AT91FR40162.html

   1 <html>
   2 <head>
   3 <title>Test results for revision 1.62</title>
   4 </head>
   5
   6 <body>
   7
   8 <H1>SAM7</H1>
   9
  10 <H2>Connectivity</H2>
  11 <table border=1>
  12         <tr>
  13                 <td>ID</td>
  14                 <td>Target</td>
  15                 <td>Interface</td>
  16                 <td>Description</td>
  17                 <td>Initial state</td>
  18                 <td>Input</td>
  19                 <td>Expected output</td>
  20                 <td>Actual output</td>
  21                 <td>Pass/Fail</td>
  22         </tr>
  23         <tr>
  24                 <td><a name="CON001"/>CON001</td>
  25                 <td>AT91FR40162</td>
  26                 <td>ZY1000</td>
  27                 <td>Telnet connection</td>
  28                 <td>Power on, jtag target attached</td>
  29                 <td>On console, type<br><code>telnet ip port</code></td>
  30                 <td><code>Open On-Chip Debugger<br>></code></td>
  31                 <td><code>Open On-Chip Debugger<br>></code></td>
  32                 <td>PASS</td>
  33         </tr>
  34         <tr>
  35                 <td><a name="CON002"/>CON002</td>
  36                 <td>AT91FR40162</td>
  37                 <td>ZY1000</td>
  38                 <td>GDB server connection</td>
  39                 <td>Power on, jtag target attached</td>
  40                 <td>On GDB console, type<br><code>target remote ip:port</code></td>
  41                 <td><code>Remote debugging using 10.0.0.73:3333</code></td>
  42                 <td><code>
  43                         (gdb) tar remo 10.0.0.138:3333<br>
  44                         Remote debugging using 10.0.0.138:3333<br>
  45                         0x000155b8 in ?? ()<br>
  46                 </code></td>
  47                 <td>PASS</td>
  48         </tr>
  49 </table>
  50
  51 <H2>Reset</H2>
  52 <table border=1>
  53         <tr>
  54                 <td>ID</td>
  55                 <td>Target</td>
  56                 <td>Interface</td>
  57                 <td>Description</td>
  58                 <td>Initial state</td>
  59                 <td>Input</td>
  60                 <td>Expected output</td>
  61                 <td>Actual output</td>
  62                 <td>Pass/Fail</td>
  63         </tr>
  64         <tr>
  65                 <td><a name="RES001"/>RES001</td>
  66                 <td>AT91FR40162</td>
  67                 <td>ZY1000</td>
  68                 <td>Reset halt on a blank target</td>
  69                 <td>Erase all the content of the flash</td>
  70                 <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
  71                 <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
  72                 <td>
  73                         <code>
  74                                 > mdw  0x01000000 32<br>
  75                                 0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  76                                 0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  77                                 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  78                                 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  79                                 > reset halt<br>
  80                                 JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  81                                 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  82                                 target state: halted<br>
  83                                 target halted in ARM state due to debug-request, current mode: Supervisor<br>
  84                                 cpsr: 0x600000d3 pc: 0x00008a70<br>
  85                                 > <br>
  86                         </code>
  87                 </td>
  88                 <td>PASS</td>
  89         </tr>
  90         <tr>
  91                 <td><a name="RES002"/>RES002</td>
  92                 <td>AT91FR40162</td>
  93                 <td>ZY1000</td>
  94                 <td>Reset init on a blank target</td>
  95                 <td>Erase all the content of the flash</td>
  96                 <td>Connect via the telnet interface and type <br><code>reset init</code></td>
  97                 <td>Reset should return without error and the output should contain <br><code>executing reset script 'name_of_the_script'</code></td>
  98                 <td>
  99                         <code>
 100                                 > reset init<br>
 101                                 JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
 102                                 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 103                                 target state: halted<br>
 104                                 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 105                                 cpsr: 0x600000d3 pc: 0x00008ea4<br>
 106                                 > <br>
 107                         </code>
 108                 </td>
 109                 <td>PASS<br>
 110                 NOTE! Even if there is no message, the reset script is being executed (proved by side effects)</td>
 111         </tr>
 112         <tr>
 113                 <td><a name="RES003"/>RES003</td>
 114                 <td>AT91FR40162</td>
 115                 <td>ZY1000</td>
 116                 <td>Reset after a power cycle of the target</td>
 117                 <td>Reset the target then power cycle the target</td>
 118                 <td>Connect via the telnet interface and type <br><code>reset halt</code> after the power was detected</td>
 119                 <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
 120                 <td>
 121                         <code>
 122                                 Sensed nSRST asserted<br>
 123                                 Sensed power dropout.<br>
 124                                 target state: halted<br>
 125                                 target halted in ARM state due to debug request, current mode: Supervisor<br>
 126                                 cpsr: 0xf00000d3 pc: 0xd5dff7e6<br>
 127                                 Sensed power restore.<br>
 128                                 Sensed nSRST deasserted<br>
 129                                 > reset halt<br>
 130                                 JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)<br>
 131                                 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 132                                 target state: halted<br>
 133                                 target halted in ARM state due to debug request, current mode: Supervisor<br>
 134                                 cpsr: 0xf00000d3 pc: 0x0000072c<br>
 135                                 ><br>
 136                         </code>
 137                 </td>
 138                 <td>PASS</td>
 139         </tr>
 140         <tr>
 141                 <td><a name="RES004"/>RES004</td>
 142                 <td>AT91FR40162</td>
 143                 <td>ZY1000</td>
 144                 <td>Reset halt on a blank target where reset halt is supported</td>
 145                 <td>Erase all the content of the flash</td>
 146                 <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
 147                 <td>Reset should return without error and the output should contain<br><code>target state: halted<br>pc = 0</code></td>
 148                 <td>
 149                         > reset halt<br>
 150                         JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
 151                         srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 152                         target state: halted<br>
 153                         target halted in ARM state due to debug-request, current mode: Supervisor<br>
 154                         cpsr: 0xf00000d3 pc: 0x00008b38<br>
 155                         > <br>
 156                 </td>
 157                 <td>PASS</td>
 158         </tr>
 159         <tr>
 160                 <td><a name="RES005"/>RES005</td>
 161                 <td>AT91FR40162</td>
 162                 <td>ZY1000</td>
 163                 <td>Reset halt on a blank target using return clock</td>
 164                 <td>Erase all the content of the flash, set the configuration script to use RCLK</td>
 165                 <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
 166                 <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
 167                 <td>
 168                         <code>
 169                                 N/A, At91EB40A does <bold>NOT</bold> have support for RCLK
 170                         </code>
 171                 </td>
 172                 <td>N/A</td>
 173         </tr>
 174 </table>
 175
 176 <H2>JTAG Speed</H2>
 177 <table border=1>
 178         <tr>
 179                 <td>ID</td>
 180                 <td>Target</td>
 181                 <td>ZY1000</td>
 182                 <td>Description</td>
 183                 <td>Initial state</td>
 184                 <td>Input</td>
 185                 <td>Expected output</td>
 186                 <td>Actual output</td>
 187                 <td>Pass/Fail</td>
 188         </tr>
 189         <tr>
 190                 <td><a name="SPD001"/>SPD001</td>
 191                 <td>AT91FR40162</td>
 192                 <td>ZY1000</td>
 193                 <td>16MHz on normal operation</td>
 194                 <td>Reset init the target according to RES002 </td>
 195                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 196                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 197                 <td>
 198                         <code>
 199                                 > reset halt<br>
 200                                 JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
 201                                 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 202                                 target state: halted<br>
 203                                 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 204                                 cpsr: 0xf00000d3 pc: 0x00008ae8<br>
 205                                 > jtag_khz 16000  <br>
 206                                 jtag_speed 4 => JTAG clk=16.000000<br>
 207                                 16000 kHz<br>
 208                                 > mdw 0 32   <br>
 209                                 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 210                                 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 211                                 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 212                                 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 213                         </code>
 214                 </td>
 215                 <td>PASS</td>
 216         </tr>
 217         <tr>
 218                 <td><a name="SPD002"/>SPD002</td>
 219                 <td>AT91FR40162</td>
 220                 <td>ZY1000</td>
 221                 <td>8MHz on normal operation</td>
 222                 <td>Reset init the target according to RES002 </td>
 223                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 224                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 225                 <td>
 226                         <code>
 227                                 > reset halt    <br>
 228                                 JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
 229                                 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 230                                 target state: halted<br>
 231                                 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 232                                 cpsr: 0xf00000d3 pc: 0x00008c14<br>
 233                                 > jtag_khz 8000 <br>
 234                                 jtag_speed 8 => JTAG clk=8.000000<br>
 235                                 8000 kHz<br>
 236                                 > mdw 0 32  <br>
 237                                 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 238                                 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 239                                 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 240                                 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 241                                 > <br>
 242                         </code>
 243                 </td>
 244                 <td>PASS</td>
 245         </tr>
 246         <tr>
 247                 <td><a name="SPD003"/>SPD003</td>
 248                 <td>AT91FR40162</td>
 249                 <td>ZY1000</td>
 250                 <td>4MHz on normal operation</td>
 251                 <td>Reset init the target according to RES002 </td>
 252                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 253                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 254                 <td>
 255                         <code>
 256                                 > reset halt   <br>
 257                                 JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
 258                                 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 259                                 target state: halted<br>
 260                                 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 261                                 cpsr: 0xf00000d3 pc: 0x00008bc4<br>
 262                                 > jtag_khz 4000<br>
 263                                 jtag_speed 16 => JTAG clk=4.000000<br>
 264                                 4000 kHz<br>
 265                                 > mdw 0 32  <br>
 266                                 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 267                                 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 268                                 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 269                                 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 270                                 > <br>
 271                         </code>
 272                 </td>
 273                 <td>PASS</td>
 274         </tr>
 275         <tr>
 276                 <td><a name="SPD004"/>SPD004</td>
 277                 <td>AT91FR40162</td>
 278                 <td>ZY1000</td>
 279                 <td>2MHz on normal operation</td>
 280                 <td>Reset init the target according to RES002 </td>
 281                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 282                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 283                 <td>
 284                         <code>
 285                                 > reset halt<br>
 286                                 JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
 287                                 srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 288                                 target state: halted<br>
 289                                 target halted in ARM state due to debug-request, current mode: Supervisor<br>
 290                                 cpsr: 0xf00000d3 pc: 0x00009678<br>
 291                                 > jtag_khz 2000<br>
 292                                 jtag_speed 32 => JTAG clk=2.000000<br>
 293                                 2000 kHz<br>
 294                                 > mdw 0 32     <br>
 295                                 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 296                                 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 297                                 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 298                                 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 299                                 > <br>
 300                         </code>
 301                 </td>
 302                 <td>PASS</td>
 303         </tr>
 304         <tr>
 305                 <td><a name="SPD005"/>SPD005</td>
 306                 <td>AT91FR40162</td>
 307                 <td>ZY1000</td>
 308                 <td>RCLK on normal operation</td>
 309                 <td>Reset init the target according to RES002 </td>
 310                 <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
 311                 <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
 312                 <td>
 313                         <code>
 314                                 > jtag_khz 0<br>
 315                                 RCLK - adaptive<br>
 316                                 RCLK timeout<br>
 317                         </code>
 318                         N/A for this target
 319                 </td>
 320                 <td>N/A for this target</td>
 321         </tr>
 322 </table>
 323
 324 <H2>Debugging</H2>
 325 <table border=1>
 326         <tr>
 327                 <td>ID</td>
 328                 <td>Target</td>
 329                 <td>Interface</td>
 330                 <td>Description</td>
 331                 <td>Initial state</td>
 332                 <td>Input</td>
 333                 <td>Expected output</td>
 334                 <td>Actual output</td>
 335                 <td>Pass/Fail</td>
 336         </tr>
 337         <tr>
 338                 <td><a name="DBG001"/>DBG001</td>
 339                 <td>AT91FR40162</td>
 340                 <td>ZY1000</td>
 341                 <td>Load is working</td>
 342                 <td>Reset init is working, RAM is accesible, GDB server is started</td>
 343                 <td>On the console of the OS: <br>
 344                         <code>$ arm-none-eabi-gdb redboot_ram.elf</code><br>
 345                         <code>(gdb) target remote ip:port</code><br>
 346                         <code>(gdb) load</load>
 347                 </td>
 348                 <td>Load should return without error, typical output looks like:<br>
 349                         <code>
 350                                 Loading section .text, size 0x14c lma 0x0<br>
 351                                 Start address 0x40, load size 332<br>
 352                                 Transfer rate: 180 bytes/sec, 332 bytes/write.<br>
 353                         </code>
 354                 </td>
 355                 <td><code>
 356                         (gdb) load<br>
 357                         Loading section .rom_vectors, size 0x40 lma 0xc000<br>
 358                         Loading section .text, size 0x103e8 lma 0xc040<br>
 359                         Loading section .rodata, size 0x1a84 lma 0x1c428<br>
 360                         Loading section .data, size 0x3ec lma 0x1deac<br>
 361                         Start address 0xc040, load size 74392<br>
 362                         Transfer rate: 572 KB/sec, 9299 bytes/write.<br>
 363                         (gdb)
 364                 </code></td>
 365                 <td>PASS</td>
 366         </tr>
 367
 368         <tr>
 369                 <td><a name="DBG002"/>DBG002</td>
 370                 <td>AT91FR40162</td>
 371                 <td>ZY1000</td>
 372                 <td>Software breakpoint</td>
 373                 <td>Load the redboot_ram.elf application, use instructions from GDB001</td>
 374                 <td>In the GDB console:<br>
 375                         <code>
 376                                 (gdb) monitor arm7_9 dbgrq enable<br>
 377                                 software breakpoints enabled<br>
 378                                 (gdb) break cyg_start<br>
 379                                 Breakpoint 1 at 0xec: file src/main.c, line 71.<br>
 380                                 (gdb) continue<br>
 381                                 Continuing.
 382                         </code>
 383                 </td>
 384                 <td>The software breakpoint should be reached, a typical output looks like:<br>
 385                         <code>
 386                                 Breakpoint 1, main () at src/main.c:69<br>
 387                                 69        DWORD a = 1;<br>
 388                         </code>
 389                 </td>
 390                 <td>
 391                         <code>
 392                                 (gdb) monitor arm7_9 dbgrq enable<br>
 393                                 use of EmbeddedICE dbgrq instead of breakpoint for target halt enabled<br>
 394                                 (gdb) break cyg_start<br>
 395                                 <br>
 396                                 Breakpoint 1 at 0x155b8: file /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c, line 264.<br>
 397                                 (gdb) continue<br>
 398                                 Continuing.<br>
 399                                 <br>
 400                                 Breakpoint 1, cyg_start ()<br>
 401                                     at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
 402                                 264         CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
 403                                 (gdb) <br>
 404                         </code>
 405                 </td>
 406                 <td>PASS</td>
 407         </tr>
 408         <tr>
 409                 <td><a name="DBG003"/>DBG003</td>
 410                 <td>AT91FR40162</td>
 411                 <td>ZY1000</td>
 412                 <td>Single step in a RAM application</td>
 413                 <td>Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002</td>
 414                 <td>In GDB, type <br><code>(gdb) step</code></td>
 415                 <td>The next instruction should be reached, typical output:<br>
 416                         <code>
 417                                 (gdb) step<br>
 418                                 70        DWORD b = 2;
 419
 420                         </code>
 421                 </td>
 422                 <td>
 423                         <code>
 424                                 (gdb) step<br>
 425                                 266         CYGACC_CALL_IF_MONITOR_RETURN_SET(return_to_redboot);<br>
 426                                 (gdb)<br>
 427                         </code>
 428                 </td>
 429                 <td>PASS</td>
 430         </tr>
 431         <tr>
 432                 <td><a name="DBG004"/>DBG004</td>
 433                 <td>AT91FR40162</td>
 434                 <td>ZY1000</td>
 435                 <td>Software break points are working after a reset</td>
 436                 <td>Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002</td>
 437                 <td>In GDB, type <br><code>
 438                         (gdb) monitor reset init<br>
 439                         (gdb) load<br>
 440                         (gdb) continue<br>
 441                         </code></td>
 442                 <td>The breakpoint should be reached, typical output:<br>
 443                         <code>
 444                                 Breakpoint 1, main () at src/main.c:69<br>
 445                                 69        DWORD a = 1;
 446                         </code>
 447                 </td>
 448                 <td><code>
 449                         (gdb) moni reset init<br>
 450                         JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
 451                         srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 452                         target state: halted<br>
 453                         target halted in ARM state due to debug-request, current mode: Supervisor<br>
 454                         cpsr: 0x600000d3 pc: 0x00008ae8<br>
 455                         (gdb) load<br>
 456                         Loading section .rom_vectors, size 0x40 lma 0xc000<br>
 457                         Loading section .text, size 0x103e8 lma 0xc040<br>
 458                         Loading section .rodata, size 0x1a84 lma 0x1c428<br>
 459                         Loading section .data, size 0x3ec lma 0x1deac<br>
 460                         Start address 0xc040, load size 74392<br>
 461                         Transfer rate: 576 KB/sec, 9299 bytes/write.<br>
 462                         (gdb) c<br>
 463                         Continuing.<br>
 464                         <br>
 465                         Breakpoint 1, cyg_start ()<br>
 466                             at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
 467                         264         CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
 468                         (gdb) <br>
 469                 </code></td>
 470                 <td>PASS</td>
 471         </tr>
 472         <tr>
 473                 <td><a name="DBG005"/>DBG005</td>
 474                 <td>AT91FR40162</td>
 475                 <td>ZY1000</td>
 476                 <td>Hardware breakpoint</td>
 477                 <td>Flash the redboot_rom.elf application. Make this test after FLA004 has passed</td>
 478                 <td>Be sure that <code>gdb_memory_map</code> and <code>gdb_flash_program</code> are enabled. In GDB, type <br>
 479                         <code>
 480                                 (gdb) monitor reset init<br>
 481                                 (gdb) load<br>
 482                                 Loading section .text, size 0x194 lma 0x100000<br>
 483                                 Start address 0x100040, load size 404<br>
 484                                 Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
 485                                 (gdb) monitor arm7_9  force_hw_bkpts enable<br>
 486                                 force hardware breakpoints enabled<br>
 487                                 (gdb) break main<br>
 488                                 Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
 489                                 (gdb) continue<br>
 490                         </code>
 491                 </td>
 492                 <td>The breakpoint should be reached, typical output:<br>
 493                         <code>
 494                                 Continuing.<br>
 495                                 <br>
 496                                 Breakpoint 1, main () at src/main.c:69<br>
 497                                 69        DWORD a = 1;<br>
 498                         </code>
 499                 </td>
 500                 <td>
 501                 <code>
 502                         (gdb) load<br>
 503                         Loading section .rom_vectors, size 0x40 lma 0x1000000<br>
 504                         Loading section .text, size 0x10638 lma 0x1000040<br>
 505                         Loading section .rodata, size 0x1a84 lma 0x1010678<br>
 506                         Loading section .data, size 0x428 lma 0x10120fc<br>
 507                         Start address 0x1000040, load size 75044<br>
 508                         Transfer rate: 33 KB/sec, 9380 bytes/write.<br>
 509                         (gdb) break cyg_start<br>
 510                         Breakpoint 1 at 0x100979c: file /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c, line 264.<br>
 511                         (gdb) c<br>
 512                         Continuing.<br>
 513                         Note: automatically using hardware breakpoints for read-only addresses.<br>
 514                         <br>
 515                         Breakpoint 1, cyg_start () at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
 516                         264         CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
 517                         (gdb) <br>
 518                 </code>
 519                 </td>
 520                 <td>PASS</td>
 521         </tr>
 522         <tr>
 523                 <td><a name="DBG006"/>DBG006</td>
 524                 <td>AT91FR40162</td>
 525                 <td>ZY1000</td>
 526                 <td>Hardware breakpoint is set after a reset</td>
 527                 <td>Follow the instructions to flash and insert a hardware breakpoint from DBG005</td>
 528                 <td>In GDB, type <br>
 529                         <code>
 530                                 (gdb) monitor reset<br>
 531                                 (gdb) monitor reg pc 0x100000<br>
 532                                 pc (/32): 0x00100000<br>
 533                                 (gdb) continue
 534                         </code><br>
 535                         where the value inserted in PC is the start address of the application
 536                 </td>
 537                 <td>The breakpoint should be reached, typical output:<br>
 538                         <code>
 539                                 Continuing.<br>
 540                                 <br>
 541                                 Breakpoint 1, main () at src/main.c:69<br>
 542                                 69        DWORD a = 1;<br>
 543                         </code>
 544                 </td>
 545                 <td>
 546                 <code>
 547                         (gdb) moni reset init<br>
 548                         JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
 549                         srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
 550                         target state: halted<br>
 551                         target halted in ARM state due to debug-request, current mode: Supervisor<br>
 552                         cpsr: 0x200000d3 pc: 0x01000200<br>
 553                         (gdb) moni reg pc 0x1000000<br>
 554                         pc (/32): 0x01000000<br>
 555                         (gdb) c<br>
 556                         Continuing.<br>
 557                         <br>
 558                         Breakpoint 1, cyg_start () at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
 559                         264         CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
 560                         (gdb) <br>
 561                 </code>
 562                 </td>
 563                 <td>PASS</td>
 564         </tr>
 565         <tr>
 566                 <td><a name="DBG007"/>DBG007</td>
 567                 <td>AT91FR40162</td>
 568                 <td>ZY1000</td>
 569                 <td>Single step in ROM</td>
 570                 <td>Flash the test_rom.elf application and set a breakpoint in main, use DBG005. Make this test after FLA004 has passed</td>
 571                 <td>Be sure that <code>gdb_memory_map</code> and <code>gdb_flash_program</code> are enabled. In GDB, type <br>
 572                         <code>
 573                                 (gdb) monitor reset<br>
 574                                 (gdb) load<br>
 575                                 Loading section .text, size 0x194 lma 0x100000<br>
 576                                 Start address 0x100040, load size 404<br>
 577                                 Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
 578                                 (gdb) monitor arm7_9  force_hw_bkpts enable<br>
 579                                 force hardware breakpoints enabled<br>
 580                                 (gdb) break main<br>
 581                                 Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
 582                                 (gdb) continue<br>
 583                                 Continuing.<br>
 584                                 <br>
 585                                 Breakpoint 1, main () at src/main.c:69<br>
 586                                 69        DWORD a = 1;<br>
 587                                 (gdb) step
 588                         </code>
 589                 </td>
 590                 <td>The breakpoint should be reached, typical output:<br>
 591                         <code>
 592                                 target state: halted<br>
 593                                 target halted in ARM state due to single step, current mode: Supervisor<br>
 594                                 cpsr: 0x60000013 pc: 0x0010013c<br>
 595                                 70        DWORD b = 2;<br>
 596                         </code>
 597                 </td>
 598                 <td><code>
 599                         Breakpoint 1, cyg_start () at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
 600                         264         CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
 601                         (gdb) step<br>
 602                         266         CYGACC_CALL_IF_MONITOR_RETURN_SET(return_to_redboot);<br>
 603                 </code></td>
 604                 <td>PASS</td>
 605         </tr>
 606 </table>
 607
 608 <H2>RAM access</H2>
 609 Note: these tests are not designed to test/debug the target, but to test functionalities!
 610 <table border=1>
 611         <tr>
 612                 <td>ID</td>
 613                 <td>Target</td>
 614                 <td>Interface</td>
 615                 <td>Description</td>
 616                 <td>Initial state</td>
 617                 <td>Input</td>
 618                 <td>Expected output</td>
 619                 <td>Actual output</td>
 620                 <td>Pass/Fail</td>
 621         </tr>
 622         <tr>
 623                 <td><a name="RAM001"/>RAM001</td>
 624                 <td>AT91FR40162</td>
 625                 <td>ZY1000</td>
 626                 <td>32 bit Write/read RAM</td>
 627                 <td>Reset init is working</td>
 628                 <td>On the telnet interface<br>
 629                         <code>  > mww ram_address 0xdeadbeef 16<br>
 630                                         > mdw ram_address 32
 631                         </code>
 632                 </td>
 633                 <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 32bit long containing 0xdeadbeef.<br>
 634                         <code>
 635                                 > mww 0x0 0xdeadbeef 16<br>
 636                                 > mdw 0x0 32<br>
 637                                 0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 638                                 0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 639                                 0x00000040: e1a00000 e59fa51c e59f051c e04aa000 00080017 00009388 00009388 00009388<br>
 640                                 0x00000060: 00009388 0002c2c0 0002c2c0 000094f8 000094f4 00009388 00009388 00009388<br>
 641                         </code>
 642                 </td>
 643                 <td><code>
 644                         > mww 0 0xdeadbeef 16<br>
 645                         > mdw 0x0 32         <br>
 646                         0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 647                         0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef <br>
 648                         0x00000040: 15aadc6d 425b6f33 e789f955 d390dcc2 00080017 010067b4 010067b4 010067b4 <br>
 649                         0x00000060: 010067b4 00006e74 00006e74 010067b4 010067b4 010067b4 010067b4 010067b4 <br>
 650                 </code></td>
 651                 <td>PASS</td>
 652         </tr>
 653         <tr>
 654                 <td><a name="RAM002"/>RAM002</td>
 655                 <td>AT91FR40162</td>
 656                 <td>ZY1000</td>
 657                 <td>16 bit Write/read RAM</td>
 658                 <td>Reset init is working</td>
 659                 <td>On the telnet interface<br>
 660                         <code>  > mwh ram_address 0xbeef 16<br>
 661                                         > mdh ram_address 32
 662                         </code>
 663                 </td>
 664                 <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 16bit long containing 0xbeef.<br>
 665                         <code>
 666                                 > mwh 0x0 0xbeef 16<br>
 667                                 > mdh 0x0 32<br>
 668                                 0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef<br>
 669                                 0x00000020: 00e0 0000 021c 0000 0240 0000 026c 0000 0288 0000 0000 0000 0388 0000 0350 0000<br>
 670                                 >
 671                         </code>
 672                 </td>
 673                 <td><code>
 674                                 > mwh 0 0xbeef 16<br>
 675                                 > mdh 0x0 32<br>
 676                                 0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef<br>
 677                                 0x00000020:   00   00   00   00   00   00   00   00   00   00   00   00   00   00   00   00 <br>
 678                         </code></td>
 679                 <td>PASS<br>There is a problem with the formatting of the output</td>
 680         </tr>
 681         <tr>
 682                 <td><a name="RAM003"/>RAM003</td>
 683                 <td>AT91FR40162</td>
 684                 <td>ZY1000</td>
 685                 <td>8 bit Write/read RAM</td>
 686                 <td>Reset init is working</td>
 687                 <td>On the telnet interface<br>
 688                         <code>  > mwb ram_address 0xab 16<br>
 689                                         > mdb ram_address 32
 690                         </code>
 691                 </td>
 692                 <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 8bit long containing 0xab.<br>
 693                         <code>
 694                                 > mwb ram_address 0xab 16<br>
 695                                 > mdb ram_address 32<br>
 696                                 0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>
 697                                 >
 698                         </code>
 699                 </td>
 700                 <td><code>
 701                         > mwb 0x0 0xab 16<br>
 702                         > mdb 0x0 32     <br>
 703                         0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>
 704                 </code></td>
 705                 <td>PASS</td>
 706         </tr>
 707 </table>
 708
 709
 710
 711 <H2>Flash access</H2>
 712 <table border=1>
 713         <tr>
 714                 <td>ID</td>
 715                 <td>Target</td>
 716                 <td>Interface</td>
 717                 <td>Description</td>
 718                 <td>Initial state</td>
 719                 <td>Input</td>
 720                 <td>Expected output</td>
 721                 <td>Actual output</td>
 722                 <td>Pass/Fail</td>
 723         </tr>
 724         <tr>
 725                 <td><a name="FLA001"/>FLA001</td>
 726                 <td>AT91FR40162</td>
 727                 <td>ZY1000</td>
 728                 <td>Flash probe</td>
 729                 <td>Reset init is working</td>
 730                 <td>On the telnet interface:<br>
 731                         <code>  > flash probe 0</code>
 732                 </td>
 733                 <td>The command should execute without error. The output should state the name of the flash and the starting address. An example of output:<br>
 734                         <code>flash 'ecosflash' found at 0x01000000</code>
 735                 </td>
 736                 <td>
 737                 <code>
 738                         > flash probe 0
 739                         flash 'ecosflash' found at 0x01000000
 740                 </code>
 741                 </td>
 742                 <td>PASS</td>
 743         </tr>
 744         <tr>
 745                 <td><a name="FLA002"/>FLA002</td>
 746                 <td>AT91FR40162</td>
 747                 <td>ZY1000</td>
 748                 <td>flash fillw</td>
 749                 <td>Reset init is working, flash is probed</td>
 750                 <td>On the telnet interface<br>
 751                         <code>  > flash fillw 0x100000 0xdeadbeef 16
 752                         </code>
 753                 </td>
 754                 <td>The commands should execute without error. The output looks like:<br>
 755                         <code>
 756                                 wrote 64 bytes to 0x0100000 in 11.610000s (0.091516 kb/s)
 757                         </code><br>
 758                         To verify the contents of the flash:<br>
 759                         <code>
 760                                 > mdw 0x100000 32<br>
 761                                 0x0100000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 762                                 0x0100020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 763                                 0x0100040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 764                                 0x0100060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
 765                         </code>
 766                 </td>
 767                 <td><code>
 768                                 > flash fillw 0x01000000 0xdeadbeef 16 <br>
 769                                 wrote 64 bytes to 0x01000000 in 0.010000s (6.250 kb/s)<br>
 770                                 > mdw 0x1000000 32<br>
 771                                 0x01000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
 772                                 0x01000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef <br>
 773                                 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 774                                 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 775                                 >
 776                         </code></td>
 777                 <td>PASS</td>
 778         </tr>
 779         <tr>
 780                 <td><a name="FLA003"/>FLA003</td>
 781                 <td>AT91FR40162</td>
 782                 <td>ZY1000</td>
 783                 <td>Flash erase</td>
 784                 <td>Reset init is working, flash is probed</td>
 785                 <td>On the telnet interface<br>
 786                         <code>  >  flash erase_address 0x100000 0x2000
 787                         </code>
 788                 </td>
 789                 <td>The commands should execute without error.<br>
 790                         <code>
 791                                 erased address 0x0100000 length 8192 in 4.970000s
 792                         </code>
 793                         To check that the flash has been erased, read at different addresses. The result should always be 0xff.
 794                         <code>
 795                                 > mdw 0x100000 32<br>
 796                                 0x0100000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 797                                 0x0100020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 798                                 0x0100040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 799                                 0x0100060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
 800                         </code>
 801                 </td>
 802                 <td><code>
 803                         > flash erase_address 0x1000000 0x10000<br>
 804                         erased address 0x01000000 (length 65536) in 0.840000s (76.190 kb/s)<br>
 805                         > mdw 0x1000000 32                     <br>
 806                         0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
 807                         0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 808                         0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 809                         0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
 810                 </code></td>
 811                 <td>PASS</td>
 812         </tr>
 813         <tr>
 814                 <td><a name="FLA004"/>FLA004</td>
 815                 <td>AT91FR40162</td>
 816                 <td>ZY1000</td>
 817                 <td>Loading to flash from GDB</td>
 818                 <td>Reset init is working, flash is probed, connectivity to GDB server is working</td>
 819                 <td>Start GDB using a ROM elf image, eg: arm-elf-gdb test_rom.elf. <br>
 820                                 <code>
 821                                         (gdb) target remote ip:port<br>
 822                                         (gdb) monitor reset halt<br>
 823                                         (gdb) load<br>
 824                                         Loading section .text, size 0x194 lma 0x100000<br>
 825                                         Start address 0x100040, load size 404<br>
 826                                         Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
 827                                         (gdb) monitor verify_image path_to_elf_file
 828                                 </code>
 829                 </td>
 830                 <td>The output should look like:<br>
 831                         <code>
 832                                 verified 404 bytes in 5.060000s
 833                         </code><br>
 834                         The failure message is something like:<br>
 835                         <code>Verify operation failed address 0x00200000. Was 0x00 instead of 0x18</code>
 836                 </td>
 837                 <td>
 838                         <code>
 839                                 (gdb) load<br>
 840                                 Loading section .rom_vectors, size 0x40 lma 0x1000000<br>
 841                                 Loading section .text, size 0x10638 lma 0x1000040<br>
 842                                 Loading section .rodata, size 0x1a84 lma 0x1010678<br>
 843                                 Loading section .data, size 0x428 lma 0x10120fc<br>
 844                                 Start address 0x1000040, load size 75044<br>
 845                                 Transfer rate: 34 KB/sec, 9380 bytes/write.<br>
 846                                 (gdb) moni verify_image /tftp/10.0.0.190/redboot_rom.elf<br>
 847                                 keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1820). Workaround: increase "set remotetimeout" in GDB<br>
 848                                 verified 75044 bytes in 1.960000s (37.390 kb/s)<br>
 849                         </code>
 850                 </td>
 851                 <td>PASS</td>
 852         </tr>
 853 </table>
 854
 855 </body>
 856 </html>