wip
[openocd.git] / testing / examples / ledtest-imx31pdk / gdbinit-imx31pdk
1 echo Setting up for the FreeScale iMX31 Board.\n
2 # SETUP GDB :
3 #
4 # Common gdb setup for ARM CPUs
5 set complaints 1
6 set output-radix 10
7 set input-radix 10
8 set prompt (arm-gdb)
9 set endian little
10 dir .
11
12
13 # DEFINE MACROS :
14 #
15 # Create a "refresh" macro to update gdb's screens after the cpu
16 # has been stopped by the other CPU or following an "monitor allstop"
17 define refresh
18 monitor set hbreak
19 cont
20 monitor clear hbreak
21 end
22
23
24 # CONNECT TO TARGET :
25 target remote 127.0.0.1:3333
26 monitor reset run
27 #FIX!!!! should be reset init!
28 monitor reset halt
29
30 # iMX31 PDK board initialization commands:
31
32 #// init_ccm
33
34 monitor mww 0x53FC0000 0x040
35 monitor mww 0x53F80000 0x074B0B7D
36
37 #//532-133-66.5
38 #//monitor mww 0x53F80004 0xFF871D58
39 #//monitor mww 0x53F80010 0x0033280C
40
41 #// 399MHz - 26MHz input, PD=1,MFI=7, MFN=27, MFD=40
42 monitor mww 0x53F80004 0xFF871D50
43 monitor mww 0x53F80010 0x00271C1B
44
45 #// 208-104-52
46 #//monitor mww 0x53F80004 0xFF871D48
47 #//monitor mww 0x53F80010 0x04002000
48
49
50 #// Configure CPLD on CS5
51 monitor mww 0xb8002050 0x0000DCF6
52 monitor mww 0xb8002054 0x444A4541
53 monitor mww 0xb8002058 0x44443302
54
55 #// Disable maximum drive strength for SDRAM/DDR lines by clearing DSE1 bits
56 #// in SW_PAD_CTL registers
57
58 #// SDCLK
59 monitor mww 0x43FAC26C 0
60
61 #// CAS
62 monitor mww 0x43FAC270 0
63
64 #// RAS
65 monitor mww 0x43FAC274 0
66
67 #// CS2 (CSD0)
68 monitor mww 0x43FAC27C 0x1000
69
70 #// DQM3
71 monitor mww 0x43FAC284 0
72
73 #// DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC)
74 monitor mww 0x43FAC288 0
75 monitor mww 0x43FAC28C 0
76 monitor mww 0x43FAC290 0
77 monitor mww 0x43FAC294 0
78 monitor mww 0x43FAC298 0
79 monitor mww 0x43FAC29C 0
80 monitor mww 0x43FAC2A0 0
81 monitor mww 0x43FAC2A4 0
82 monitor mww 0x43FAC2A8 0
83 monitor mww 0x43FAC2AC 0
84 monitor mww 0x43FAC2B0 0
85 monitor mww 0x43FAC2B4 0
86 monitor mww 0x43FAC2B8 0
87 monitor mww 0x43FAC2BC 0
88 monitor mww 0x43FAC2C0 0
89 monitor mww 0x43FAC2C4 0
90 monitor mww 0x43FAC2C8 0
91 monitor mww 0x43FAC2CC 0
92 monitor mww 0x43FAC2D0 0
93 monitor mww 0x43FAC2D4 0
94 monitor mww 0x43FAC2D8 0
95 monitor mww 0x43FAC2DC 0
96
97 #// Initialization script for 32 bit DDR on MX31 PDK
98 monitor mww 0xB8001010 0x00000004
99 monitor mww 0xB8001004 0x006ac73a
100 monitor mww 0xB8001000 0x92100000
101 monitor mww 0x80000f00 0x12344321
102 monitor mww 0xB8001000 0xa2100000
103 monitor mww 0x80000000 0x12344321
104 monitor mww 0x80000000 0x12344321
105 monitor mww 0xB8001000 0xb2100000
106 #monitor char 0x80000033 0xda
107 monitor mwb 0x80000033 0xda
108 #monitor char 0x81000000 0xff
109 monitor mwb 0x81000000 0xff
110 monitor mww 0xB8001000 0x82226080
111 monitor mww 0x80000000 0xDEADBEEF
112 monitor mww 0xB8001010 0x0000000c
113
114 # LOAD IMAGE :
115 #
116
117 # Load the program executable called "u-boot"
118 load test.elf
119
120 # Load the symbols for the program.
121 symbol-file test.elf
122
123 # RUN TO MAIN :
124 #
125 # Set a breakpoint at main().
126 #b reset
127 b main
128
129 # Run to the breakpoint.
130 c
131

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)