5b78daa261b1c8e6abde206815972fbede81e3a3
[openocd.git] / testing / examples / ledtest-imx31pdk / gdbinit-imx31pdk
1 echo Setting up for the FreeScale iMX31 Board.\n
2 # SETUP GDB :
3 #
4 # Common gdb setup for ARM CPUs
5 set complaints 1
6 set output-radix 10
7 set input-radix 10
8 set prompt (arm-gdb)
9 set endian little
10 dir .
11
12 # DEFINE MACROS :
13 #
14 # Create a "refresh" macro to update gdb's screens after the cpu
15 # has been stopped by the other CPU or following an "monitor allstop"
16 define refresh
17 monitor set hbreak
18 cont
19 monitor clear hbreak
20 end
21
22 # CONNECT TO TARGET :
23 target remote 127.0.0.1:3333
24 monitor reset run
25 #FIX!!!! should be reset init!
26 monitor reset halt
27
28 # iMX31 PDK board initialization commands:
29
30 #// init_ccm
31
32 monitor mww 0x53FC0000 0x040
33 monitor mww 0x53F80000 0x074B0B7D
34
35 #//532-133-66.5
36 #//monitor mww 0x53F80004 0xFF871D58
37 #//monitor mww 0x53F80010 0x0033280C
38
39 #// 399MHz - 26MHz input, PD=1,MFI=7, MFN=27, MFD=40
40 monitor mww 0x53F80004 0xFF871D50
41 monitor mww 0x53F80010 0x00271C1B
42
43 #// 208-104-52
44 #//monitor mww 0x53F80004 0xFF871D48
45 #//monitor mww 0x53F80010 0x04002000
46
47 #// Configure CPLD on CS5
48 monitor mww 0xb8002050 0x0000DCF6
49 monitor mww 0xb8002054 0x444A4541
50 monitor mww 0xb8002058 0x44443302
51
52 #// Disable maximum drive strength for SDRAM/DDR lines by clearing DSE1 bits
53 #// in SW_PAD_CTL registers
54
55 #// SDCLK
56 monitor mww 0x43FAC26C 0
57
58 #// CAS
59 monitor mww 0x43FAC270 0
60
61 #// RAS
62 monitor mww 0x43FAC274 0
63
64 #// CS2 (CSD0)
65 monitor mww 0x43FAC27C 0x1000
66
67 #// DQM3
68 monitor mww 0x43FAC284 0
69
70 #// DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC)
71 monitor mww 0x43FAC288 0
72 monitor mww 0x43FAC28C 0
73 monitor mww 0x43FAC290 0
74 monitor mww 0x43FAC294 0
75 monitor mww 0x43FAC298 0
76 monitor mww 0x43FAC29C 0
77 monitor mww 0x43FAC2A0 0
78 monitor mww 0x43FAC2A4 0
79 monitor mww 0x43FAC2A8 0
80 monitor mww 0x43FAC2AC 0
81 monitor mww 0x43FAC2B0 0
82 monitor mww 0x43FAC2B4 0
83 monitor mww 0x43FAC2B8 0
84 monitor mww 0x43FAC2BC 0
85 monitor mww 0x43FAC2C0 0
86 monitor mww 0x43FAC2C4 0
87 monitor mww 0x43FAC2C8 0
88 monitor mww 0x43FAC2CC 0
89 monitor mww 0x43FAC2D0 0
90 monitor mww 0x43FAC2D4 0
91 monitor mww 0x43FAC2D8 0
92 monitor mww 0x43FAC2DC 0
93
94 #// Initialization script for 32 bit DDR on MX31 PDK
95 monitor mww 0xB8001010 0x00000004
96 monitor mww 0xB8001004 0x006ac73a
97 monitor mww 0xB8001000 0x92100000
98 monitor mww 0x80000f00 0x12344321
99 monitor mww 0xB8001000 0xa2100000
100 monitor mww 0x80000000 0x12344321
101 monitor mww 0x80000000 0x12344321
102 monitor mww 0xB8001000 0xb2100000
103 #monitor char 0x80000033 0xda
104 monitor mwb 0x80000033 0xda
105 #monitor char 0x81000000 0xff
106 monitor mwb 0x81000000 0xff
107 monitor mww 0xB8001000 0x82226080
108 monitor mww 0x80000000 0xDEADBEEF
109 monitor mww 0xB8001010 0x0000000c
110
111 # LOAD IMAGE :
112 #
113
114 # Load the program executable called "u-boot"
115 load test.elf
116
117 # Load the symbols for the program.
118 symbol-file test.elf
119
120 # RUN TO MAIN :
121 #
122 # Set a breakpoint at main().
123 #b reset
124 b main
125
126 # Run to the breakpoint.
127 c
128

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