tcl/target/xba_revA3.cfg

   1 #Written by: Michael Schwingen <rincewind@discworld.dascon.de>
   2
   3 if { [info exists CHIPNAME] } {
   4    set  _CHIPNAME $CHIPNAME
   5 } else {
   6    set  _CHIPNAME xba_reva3
   7 }
   8
   9 if { [info exists ENDIAN] } {
  10    set  _ENDIAN $ENDIAN
  11 } else {
  12   # default to big endian
  13    set  _ENDIAN big
  14 }
  15
  16 if { [info exists CPUTAPID ] } {
  17    set _CPUTAPID $CPUTAPID
  18 } else {
  19   # force an error till we get a good number
  20    set _CPUTAPID 0xffffffff
  21 }
  22
  23 reset_config trst_and_srst separate
  24
  25 adapter_nsrst_delay 100
  26 jtag_ntrst_delay 100
  27
  28 #jtag scan chain
  29 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
  30
  31 set _TARGETNAME $_CHIPNAME.cpu
  32 target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
  33
  34 $_TARGETNAME configure -event reset-init {
  35         #############################################################################
  36         # setup expansion bus CS, disable external wdt
  37         #############################################################################
  38         mww 0xc4000000  0xbd113842  ;#CS0  : Flash, write enabled @0x50000000
  39         mww 0xc4000004  0x94d10013  ;#CS1
  40         mww 0xc4000008  0x95960003  ;#CS2
  41         mww 0xc400000c  0x00000000  ;#CS3
  42         mww 0xc4000010  0x80900003  ;#CS4
  43         mww 0xc4000014  0x9d520003  ;#CS5
  44         mww 0xc4000018  0x81860001  ;#CS6
  45         mww 0xc400001c  0x80900003  ;#CS7
  46
  47         #############################################################################
  48         # init SDRAM controller: 16MB, one bank, CL3
  49         #############################################################################
  50         mww 0xCC000000  0x2A ;# SDRAM_CFG: 64MBit, CL3
  51         mww 0xCC000004     0 ;# disable refresh
  52         mww 0xCC000008     3 ;# NOP
  53         sleep 100
  54         mww 0xCC000004  2100 ;# set refresh counter
  55         mww 0xCC000008     2 ;# Precharge All Banks
  56         sleep 100
  57         mww 0xCC000008     4 ;# Auto Refresh
  58         mww 0xCC000008     4 ;# Auto Refresh
  59         mww 0xCC000008     4 ;# Auto Refresh
  60         mww 0xCC000008     4 ;# Auto Refresh
  61         mww 0xCC000008     4 ;# Auto Refresh
  62         mww 0xCC000008     4 ;# Auto Refresh
  63         mww 0xCC000008     4 ;# Auto Refresh
  64         mww 0xCC000008     4 ;# Auto Refresh
  65         mww 0xCC000008     1 ;# Mode Select CL3
  66
  67         #mww 0xc4000020  0xffffee ;# CFG0: remove expansion bus boot flash
  68         #mirror at 0x00000000
  69
  70         #big endian
  71         reg XSCALE_CTRL 0xF8
  72
  73         #
  74         # detect flash
  75         #
  76         flash probe 0
  77 }
  78
  79 $_TARGETNAME configure -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0
  80
  81
  82 set _FLASHNAME $_CHIPNAME.flash
  83 flash bank $_FLASHNAME cfi 0x50000000 0x400000 2 2 $_TARGETNAME
  84
  85 init
  86 reset init
  87 # set big endian mode
  88 reg XSCALE_CTRL 0xF8