tcl/target/u8500.cfg

   1 #  Copyright (C) ST-Ericsson SA 2011
   2 #  Author : michel.jaouen@stericsson.com
   3 #  U8500 target
   4
   5 proc mmu_off {} {
   6         set cp [arm mrc 15 0 1 0 0]
   7         set cp [expr ($cp & ~1)]
   8         arm mcr 15 0 1 0 0 $cp
   9 }
  10
  11 proc mmu_on {} {
  12         set cp [arm mrc 15 0 1 0 0]
  13         set cp [expr ($cp | 1)]
  14         arm mcr 15 0 1 0 0 $cp
  15 }
  16
  17 proc ocd_gdb_restart {target_id} {
  18     global _TARGETNAME_1
  19         global _SMP
  20     targets $_TARGETNAME_1
  21         if { [expr ($_SMP == 1)] } {
  22         cortex_a smp_off
  23         }
  24         rst_run
  25         halt
  26         if { [expr ($_SMP == 1)]} {
  27         cortex_a smp_on
  28         }
  29 }
  30
  31 proc smp_reg {} {
  32         global _TARGETNAME_1
  33     global _TARGETNAME_2
  34     targets $_TARGETNAME_1
  35         echo "$_TARGETNAME_1"
  36         set pc1 [reg pc]
  37         set stck1 [reg sp_svc]
  38         targets $_TARGETNAME_2
  39         echo "$_TARGETNAME_1"
  40         set pc2 [reg pc]
  41         set stck2 [reg sp_svc]
  42 }
  43
  44
  45 proc u8500_tapenable {chip val} {
  46         echo "JTAG tap enable $chip"
  47 }
  48
  49
  50 proc pwrsts { } {
  51         global _CHIPNAME
  52         irscan $_CHIPNAME.jrc 0x3a
  53         drscan $_CHIPNAME.jrc 4 0
  54         set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  55     echo "pwrsts ="$pwrsts
  56     set a9 [expr (0x$pwrsts & 0xc)]
  57         set ape [expr (0x$pwrsts & 0x3)]
  58         if {[string equal "0" $ape]} {
  59                 echo "ape off"
  60         } else {
  61                 echo "ape on"
  62         }
  63         echo "$a9"
  64         switch $a9 {
  65                 4 {
  66                         echo "A9 in retention"
  67                   }
  68                 8 {
  69                         echo "A9 100% DVFS"
  70                   }
  71                 c {
  72                         echo "A9 50% DVFS"
  73                 }
  74         }
  75 }
  76
  77 proc poll_pwrsts { } {
  78         global _CHIPNAME
  79         set result 1
  80         set i 0
  81         irscan $_CHIPNAME.jrc 0x3a
  82         drscan $_CHIPNAME.jrc 4 0
  83         set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  84         set pwrsts [expr (0x$pwrsts & 0xc)]
  85         while {[string equal "4" $pwrsts] && $i<20} {
  86                 irscan $_CHIPNAME.jrc 0x3a
  87                 drscan $_CHIPNAME.jrc 4 0;
  88                 set pwrsts [drscan $_CHIPNAME.jrc 16 0]
  89                 set pwrsts [expr (0x$pwrsts & 0xc)]
  90                 if {![string equal "4" $pwrsts]} {
  91                         set result 1
  92                 } else {
  93                         set result 0
  94                         sleep 200
  95                         echo "loop $i"
  96                 }
  97                 incr i
  98         }
  99         return $result
 100 }
 101
 102 proc halt_ { } {
 103         if {[poll_pwrsts]==1} {
 104                 halt
 105         } else {
 106                 echo "halt failed : target in retention"
 107         }
 108 }
 109
 110
 111 proc u8500_dapenable {chip} {
 112 }
 113
 114 proc u8500_tapdisable {chip val} {
 115         echo "JTAG tap disable $chip"
 116 }
 117
 118
 119 proc enable_apetap {} {
 120         global _CHIPNAME
 121         global _TARGETNAME_2
 122     global _TARGETNAME_1
 123         poll off
 124         irscan $_CHIPNAME.jrc 0x3e
 125         drscan $_CHIPNAME.jrc 8 0xcf
 126         jtag tapenable $_CHIPNAME.dap
 127         irscan $_CHIPNAME.jrc 0x6
 128         drscan $_CHIPNAME.jrc 32 0
 129         irscan $_CHIPNAME.jrc 0x6
 130         drscan $_CHIPNAME.jrc 32 0
 131         set status [$_TARGETNAME_1 curstate]
 132     if {[string equal "unknown" $status]} {
 133         $_TARGETNAME_1 arp_examine
 134         cache_config l2x 0xa0412000 8
 135         }
 136
 137         set status [$_TARGETNAME_2 curstate]
 138     if {[string equal "unknown" $status]} {
 139         $_TARGETNAME_2 arp_examine
 140         }
 141         }
 142
 143 tcl_port 5555
 144 telnet_port 4444
 145 gdb_port 3333
 146
 147 if { [info exists CHIPNAME] } {
 148 global _CHIPNAME
 149     set _CHIPNAME $CHIPNAME
 150 } else {
 151 global _CHIPNAME
 152         set _CHIPNAME u8500
 153 }
 154
 155 if { [info exists ENDIAN] } {
 156         set _ENDIAN $ENDIAN
 157 } else {
 158  # this defaults to a bigendian
 159         set _ENDIAN little
 160 }
 161
 162
 163
 164 # Subsidiary TAP: APE with scan chains for ARM Debug, EmbeddedICE-RT,
 165 if { [info exists CPUTAPID] } {
 166    set _CPUTAPID $CPUTAPID
 167 } else {
 168         set _CPUTAPID 0x4ba00477
 169 }
 170 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xe -irmask 0xf -expected-id $_CPUTAPID -disable
 171 jtag configure $_CHIPNAME.cpu -event tap-enable \
 172         "u8500_dapenable $_CHIPNAME.cpu"
 173 jtag configure $_CHIPNAME.cpu -event tap-disable \
 174         "u8500_tapdisable $_CHIPNAME.cpu 0xc0"
 175
 176
 177 #CLTAPC TAP JRC equivalent
 178 if { [info exists CLTAPC_ID] } {
 179    set _CLTAPC_ID $CLTAPC_ID
 180 } else {
 181    set _CLTAPC_ID 0x22286041
 182 }
 183 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x6 -irmask 0xf -expected-id $_CLTAPC_ID -ignore-version
 184
 185
 186 if { ![info exists TARGETNAME_1] } {
 187 global _TARGETNAME_1
 188 set _TARGETNAME_1 $_CHIPNAME.cpu1
 189 } else {
 190 global _TARGETNAME_1
 191 set _TARGETNAME_1 $TARGETNAME_1
 192 }
 193
 194 if { [info exists DAP_DBG1] } {
 195         set _DAP_DBG1 $DAP_DBG1
 196 } else {
 197         set _DAP_DBG1 0x801A8000
 198 }
 199 if { [info exists DAP_DBG2] } {
 200         set _DAP_DBG2 $DAP_DBG2
 201 } else {
 202         set _DAP_DBG2 0x801AA000
 203 }
 204
 205 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 206
 207 target create $_TARGETNAME_1 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG1 -coreid 0 -rtos linux
 208
 209 $_TARGETNAME_1 configure -event gdb-attach {
 210         halt
 211 }
 212
 213
 214 if { ![info exists TARGETNAME_2] } {
 215 global _TARGETNAME_2
 216 set _TARGETNAME_2 $_CHIPNAME.cpu2
 217 } else {
 218 global _TARGETNAME_2
 219 set _TARGETNAME_2 $TARGETNAME_2
 220 }
 221
 222 target create $_TARGETNAME_2 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG2 -coreid 1 -rtos linux
 223
 224 $_TARGETNAME_2 configure -event gdb-attach {
 225         halt
 226 }
 227
 228
 229 if {![info exists SMP]} {
 230 global _SMP
 231 set _SMP 1
 232 } else {
 233 global _SMP
 234 set _SMP $SMP
 235 }
 236 global SMP
 237 if { $_SMP == 1} {
 238 target smp $_CHIPNAME.cpu2 $_CHIPNAME.cpu1
 239 }
 240
 241
 242
 243
 244 proc secsts1 { } {
 245         global _CHIPNAME
 246         irscan $_CHIPNAME.jrc 0x3a
 247                 drscan $_CHIPNAME.jrc 4 4
 248         set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 249         echo "secsts1 ="$secsts1
 250         set secsts1 [expr (0x$secsts1 & 0x4)]
 251         if {![string equal "4" $secsts1]} {
 252         echo "APE target secured"
 253         } else {
 254         echo "APE target not secured"
 255         }
 256 }
 257
 258 proc att { } {
 259         global _CHIPNAME
 260         jtag arp_init
 261         irscan $_CHIPNAME.jrc 0x3a
 262         drscan $_CHIPNAME.jrc 4 4
 263         set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 264         echo "secsts1 ="$secsts1
 265         set secsts1 [expr (0x$secsts1 & 0x4)]
 266         if {[string equal "4" $secsts1]} {
 267                 if {[poll_pwrsts]==1} {
 268                 enable_apetap
 269                 } else {
 270                 echo "target in retention"
 271                 }
 272         } else {
 273                 echo "target secured"
 274         }
 275
 276 }
 277
 278
 279
 280 proc rst_run { } {
 281         global _CHIPNAME
 282         global _TARGETNAME_2
 283         global _TARGETNAME_1
 284         set status [$_TARGETNAME_1 curstate]
 285         if {[string equal "halted" $status]} {
 286         resume
 287         targets $_TARGETNAME_1
 288         }
 289     set status [$_TARGETNAME_2 curstate]
 290         if {[string equal "halted" $status]} {
 291         resume
 292         targets $_TARGETNAME_2
 293         }
 294         poll off
 295         jtag arp_init
 296         reset
 297         sleep 20
 298         irscan $_CHIPNAME.jrc 0x3a
 299         drscan $_CHIPNAME.jrc 4 4
 300         set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 301         echo "secsts1 ="$secsts1
 302         set secsts1 [expr (0x$secsts1 & 0x4)]
 303         while {![string equal "4" $secsts1]} {
 304                 irscan u8500.jrc 0x3a
 305                 drscan u8500.jrc 4 4
 306                 set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 307                 echo "secsts1 ="$secsts1
 308                 set secsts1 [expr (0x$secsts1 & 0x4)]
 309         }
 310         echo "ape debugable"
 311         enable_apetap
 312         poll on
 313         targets $_TARGETNAME_1
 314         dap apsel 1
 315 }
 316
 317 if {![info exists MAXSPEED]} {
 318 global _MAXSPEED
 319 set _MAXSPEED 15000
 320 } else {
 321 global _MAXSPEED
 322 set _MAXSPEED $MAXSPEED
 323 }
 324 global _MAXSPEED
 325 adapter_khz $_MAXSPEED
 326
 327
 328 gdb_breakpoint_override hard
 329 set mem inaccessible-by-default-off
 330
 331 jtag_ntrst_delay 100
 332 reset_config trst_and_srst combined
 333
 334