cf125abca7489ede620ae294e61b2686bfcb4da2
[openocd.git] / tcl / target / str730.cfg
1 #STR730 CPU
2
3 adapter_khz 3000
4
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
7 } else {
8 set _CHIPNAME str730
9 }
10
11 if { [info exists ENDIAN] } {
12 set _ENDIAN $ENDIAN
13 } else {
14 set _ENDIAN little
15 }
16
17 if { [info exists CPUTAPID] } {
18 set _CPUTAPID $CPUTAPID
19 } else {
20 set _CPUTAPID 0x3f0f0f0f
21 }
22
23 #use combined on interfaces or targets that can't set TRST/SRST separately
24 reset_config trst_and_srst srst_pulls_trst
25
26 #jtag scan chain
27 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
28
29 #jtag nTRST and nSRST delay
30 adapter_nsrst_delay 500
31 jtag_ntrst_delay 500
32
33 set _TARGETNAME $_CHIPNAME.cpu
34 target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
35
36 $_TARGETNAME configure -event reset-start { adapter_khz 10 }
37 $_TARGETNAME configure -event reset-init {
38 adapter_khz 3000
39
40 # Because the hardware cannot be interrogated for the protection state
41 # of sectors, initialize all the sectors to be unprotected. The initial
42 # state is reflected by the driver, too.
43 flash protect 0 0 last off
44 }
45 $_TARGETNAME configure -event gdb-flash-erase-start {
46 flash protect 0 0 7 off
47 }
48
49 $_TARGETNAME configure -work-area-phys 0xA0000000 -work-area-size 0x4000 -work-area-backup 0
50
51 #flash bank <driver> <base> <size> <chip_width> <bus_width>
52 set _FLASHNAME $_CHIPNAME.flash
53 flash bank $_FLASHNAME str7x 0x80000000 0x00040000 0 0 $_TARGETNAME STR3x
54

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