tcl/target/stm32l0.cfg

   1 #
   2 # M0+ devices only have SW-DP, but swj-dp code works, just don't
   3 # set any jtag related features
   4 #
   5
   6 source [find target/swj-dp.tcl]
   7
   8 if { [info exists CHIPNAME] } {
   9    set _CHIPNAME $CHIPNAME
  10 } else {
  11    set _CHIPNAME stm32l0
  12 }
  13
  14 set _ENDIAN little
  15
  16 # Work-area is a space in RAM used for flash programming
  17 # By default use 8kB (max ram on smallest part)
  18 if { [info exists WORKAREASIZE] } {
  19    set _WORKAREASIZE $WORKAREASIZE
  20 } else {
  21    set _WORKAREASIZE 0x2000
  22 }
  23
  24 # JTAG speed should be <= F_CPU/6.
  25 # F_CPU after reset is ~2MHz, so use F_JTAG max = 333kHz
  26 adapter_khz 300
  27
  28 adapter_nsrst_delay 100
  29
  30 if { [info exists CPUTAPID] } {
  31     set _CPUTAPID $CPUTAPID
  32 } else {
  33     # Arm, m0+, non-multidrop.
  34     # http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka16088.html
  35     set _CPUTAPID 0x0bc11477
  36 }
  37
  38 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
  39
  40 set _TARGETNAME $_CHIPNAME.cpu
  41 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  42
  43 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  44
  45 # flash size will be probed
  46 set _FLASHNAME $_CHIPNAME.flash
  47 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
  48
  49 reset_config srst_nogate
  50
  51 if {![using_hla]} {
  52    # if srst is not fitted use SYSRESETREQ to
  53    # perform a soft reset
  54    cortex_m reset_config sysresetreq
  55 }
  56
  57 proc stm32l0_enable_HSI16 {} {
  58         # Enable HSI16 as clock source
  59         echo "STM32L0: Enabling HSI16"
  60
  61         # Set HSI16ON in RCC_CR (leave MSI enabled)
  62         mww 0x40021000 0x00000101
  63
  64         # Set HSI16 as SYSCLK (RCC_CFGR)
  65         mww 0x4002100c 0x00000001
  66
  67         # Increase speed
  68         adapter_khz 2500
  69 }
  70
  71 $_TARGETNAME configure -event reset-init {
  72         stm32l0_enable_HSI16
  73 }
  74
  75 $_TARGETNAME configure -event reset-start {
  76         adapter_khz 300
  77 }