tcl/target/stm32f4x.cfg

   1 # script for stm32f4x family
   2
   3 #
   4 # stm32 devices support both JTAG and SWD transports.
   5 #
   6 source [find target/swj-dp.tcl]
   7
   8 if { [info exists CHIPNAME] } {
   9    set _CHIPNAME $CHIPNAME
  10 } else {
  11    set _CHIPNAME stm32f4x
  12 }
  13
  14 set _ENDIAN little
  15
  16 # Work-area is a space in RAM used for flash programming
  17 # By default use 64kB
  18 if { [info exists WORKAREASIZE] } {
  19    set _WORKAREASIZE $WORKAREASIZE
  20 } else {
  21    set _WORKAREASIZE 0x10000
  22 }
  23
  24 #jtag scan chain
  25 if { [info exists CPUTAPID] } {
  26    set _CPUTAPID $CPUTAPID
  27 } else {
  28    if { [using_jtag] } {
  29       # See STM Document RM0090
  30       # Section 38.6.3 - corresponds to Cortex-M4 r0p1
  31       set _CPUTAPID 0x4ba00477
  32    } {
  33       set _CPUTAPID 0x2ba01477
  34    }
  35 }
  36
  37 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  38
  39 if { [info exists BSTAPID] } {
  40    set _BSTAPID $BSTAPID
  41 } else {
  42   # See STM Document RM0090
  43   # Section 38.6.2
  44   # STM32F405xx/07xx and STM32F415xx/17xx
  45   set _BSTAPID1 0x06413041
  46   # STM32F42xxx and STM32F43xxx
  47   set _BSTAPID2 0x06419041
  48   # See STM Document RM0368 (Rev. 3)
  49   # STM32F401B/C
  50   set _BSTAPID3 0x06423041
  51   # STM32F401D/E
  52   set _BSTAPID4 0x06433041
  53   # See STM Document RM0383 (Rev 2)
  54   # STM32F411
  55   set _BSTAPID5 0x06431041
  56 }
  57
  58 if {[using_jtag]} {
  59  swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
  60      -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
  61      -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
  62 }
  63
  64 set _TARGETNAME $_CHIPNAME.cpu
  65 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  66
  67 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  68
  69 set _FLASHNAME $_CHIPNAME.flash
  70 flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
  71
  72 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz
  73 #
  74 # Since we may be running of an RC oscilator, we crank down the speed a
  75 # bit more to be on the safe side. Perhaps superstition, but if are
  76 # running off a crystal, we can run closer to the limit. Note
  77 # that there can be a pretty wide band where things are more or less stable.
  78 adapter_khz 2000
  79
  80 adapter_nsrst_delay 100
  81 if {[using_jtag]} {
  82  jtag_ntrst_delay 100
  83 }
  84
  85 if {![using_hla]} {
  86    # if srst is not fitted use SYSRESETREQ to
  87    # perform a soft reset
  88    cortex_m reset_config sysresetreq
  89 }