target: rename cortex_m3 to cortex_m
[openocd.git] / tcl / target / stm32f1x.cfg
1 # script for stm32f1x family
2
3 if { [info exists CHIPNAME] } {
4 set _CHIPNAME $CHIPNAME
5 } else {
6 set _CHIPNAME stm32f1x
7 }
8
9 if { [info exists ENDIAN] } {
10 set _ENDIAN $ENDIAN
11 } else {
12 set _ENDIAN little
13 }
14
15 # Work-area is a space in RAM used for flash programming
16 # By default use 16kB
17 if { [info exists WORKAREASIZE] } {
18 set _WORKAREASIZE $WORKAREASIZE
19 } else {
20 set _WORKAREASIZE 0x4000
21 }
22
23 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
24 adapter_khz 1000
25
26 adapter_nsrst_delay 100
27 jtag_ntrst_delay 100
28
29 #jtag scan chain
30 if { [info exists CPUTAPID] } {
31 set _CPUTAPID $CPUTAPID
32 } else {
33 # See STM Document RM0008
34 # Section 26.6.3
35 set _CPUTAPID 0x3ba00477
36 }
37 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
38
39 if { [info exists BSTAPID] } {
40 # FIXME this never gets used to override defaults...
41 set _BSTAPID $BSTAPID
42 } else {
43 # See STM Document RM0008
44 # Section 29.6.2
45 # Low density devices, Rev A
46 set _BSTAPID1 0x06412041
47 # Medium density devices, Rev A
48 set _BSTAPID2 0x06410041
49 # Medium density devices, Rev B and Rev Z
50 set _BSTAPID3 0x16410041
51 set _BSTAPID4 0x06420041
52 # High density devices, Rev A
53 set _BSTAPID5 0x06414041
54 # Connectivity line devices, Rev A and Rev Z
55 set _BSTAPID6 0x06418041
56 # XL line devices, Rev A
57 set _BSTAPID7 0x06430041
58 # VL line devices, Rev A and Z In medium-density and high-density value line devices
59 set _BSTAPID8 0x06420041
60 # VL line devices, Rev A
61 set _BSTAPID9 0x06428041
62
63 }
64 jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
65 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
66 -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
67 -expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
68 -expected-id $_BSTAPID8 -expected-id $_BSTAPID9
69
70 set _TARGETNAME $_CHIPNAME.cpu
71 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
72
73 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
74
75 # flash size will be probed
76 set _FLASHNAME $_CHIPNAME.flash
77 flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
78
79 # if srst is not fitted use SYSRESETREQ to
80 # perform a soft reset
81 cortex_m reset_config sysresetreq

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