tcl/target/snps_em_sk_fpga.cfg

   1 #  Copyright (C) 2014-2015,2020 Synopsys, Inc.
   2 #  Anton Kolesov <anton.kolesov@synopsys.com>
   3 #  Didin Evgeniy <didin@synopsys.com>
   4 #
   5 #  SPDX-License-Identifier: GPL-2.0-or-later
   6
   7 #
   8 # Xilinx Spartan-6 XC6SLX45  FPGA on EM Starter Kit v1.
   9 # Xilinx Spartan-6 XC6SLX150 FPGA on EM Starter Kit v2.
  10 #
  11
  12 source [find cpu/arc/em.tcl]
  13
  14 set _CHIPNAME arc-em
  15 set _TARGETNAME $_CHIPNAME.cpu
  16
  17 # EM SK IDENTITY is 0x200444b1
  18 # EM SK v2 IDENTITY is 0x200044b1
  19 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -expected-id 0x200444b1 \
  20   -expected-id 0x200044b1
  21
  22 set _coreid 0
  23 set _dbgbase [expr 0x00000000 | ($_coreid << 13)]
  24
  25 target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME \
  26   -coreid 0 -dbgbase $_dbgbase -endian little
  27
  28 # There is no SRST, so do a software reset
  29 $_TARGETNAME configure -event reset-assert "arc_em_reset $_TARGETNAME"
  30
  31 arc_em_init_regs
  32
  33 # vim:ft=tcl