tcl/target/samsung_s3c2450.cfg

   1 # Target configuration for the Samsung 2450 system on chip
   2 # Processor       : ARM926ejs (wb) rev 0 (v4l)
   3 # Info:   JTAG tap: s3c2450.cpu tap/device found: 0x07926F0F
   4
   5
   6 # FIX!!! what to use here?
   7 #
   8 # RCLK?
   9 #
  10 # adapter_khz 0
  11 #
  12 # Really low clock during reset?
  13 #
  14 # adapter_khz 1
  15
  16 if { [info exists CHIPNAME] } {
  17   set _CHIPNAME $CHIPNAME
  18 } else {
  19   set _CHIPNAME s3c2450
  20 }
  21
  22 if { [info exists ENDIAN] } {
  23   set _ENDIAN $ENDIAN
  24 } else {
  25  # this defaults to a bigendian
  26   set _ENDIAN little
  27 }
  28
  29 if { [info exists CPUTAPID] } {
  30   set _CPUTAPID $CPUTAPID
  31 } else {
  32   set _CPUTAPID 0x07926f0f
  33 }
  34
  35 #jtag scan chain
  36 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
  37
  38 set _TARGETNAME $_CHIPNAME.cpu
  39 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
  40
  41 # FIX!!!!! should this really use srst_pulls_trst?
  42 # With srst_pulls_trst "reset halt" will not reset into the
  43 # halted mode, but rather "reset run" and then halt the target.
  44 #
  45 # However, without "srst_pulls_trst", then "reset halt" produces weird
  46 # errors:
  47 # WARNING: unknown debug reason: 0x0
  48 reset_config trst_and_srst