tcl/target/sam7x256.cfg

   1 #use combined on interfaces or targets that can't set TRST/SRST separately
   2 reset_config srst_only srst_pulls_trst
   3
   4 if { [info exists CHIPNAME] } {
   5    set  _CHIPNAME $CHIPNAME
   6 } else {
   7    set  _CHIPNAME sam7x256
   8 }
   9
  10 if { [info exists ENDIAN] } {
  11    set  _ENDIAN $ENDIAN
  12 } else {
  13    set  _ENDIAN little
  14 }
  15
  16 if { [info exists CPUTAPID ] } {
  17    set _CPUTAPID $CPUTAPID
  18 } else {
  19    set _CPUTAPID 0x3f0f0f0f
  20 }
  21
  22 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  23
  24 set _TARGETNAME $_CHIPNAME.cpu
  25 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
  26
  27 $_TARGETNAME configure -event reset-init {
  28         # disable watchdog
  29         mww 0xfffffd44 0x00008000
  30         # enable user reset
  31         mww 0xfffffd08 0xa5000001
  32         # CKGR_MOR : enable the main oscillator
  33         mww 0xfffffc20 0x00000601
  34         sleep 10
  35         # CKGR_PLLR: 96.1097 MHz
  36         mww 0xfffffc2c 0x00481c0e
  37         sleep 10
  38         # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
  39         mww 0xfffffc30 0x00000007
  40         sleep 10
  41         # MC_FMR: flash mode (FWS=1,FMCN=60)
  42         mww 0xffffff60 0x003c0100
  43         sleep 100
  44 }
  45
  46 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
  47
  48 #flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
  49 flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432
  50
  51 # For more information about the configuration files, take a look at:
  52 # openocd.texi