2 if { [info exists CHIPNAME] } {
3 set _CHIPNAME $CHIPNAME
8 if { [info exists ENDIAN] } {
14 if { [info exists CPUTAPID ] } {
15 set _CPUTAPID $CPUTAPID
17 # force an error till we get a good number
18 set _CPUTAPID 0x30938053
21 # default working area is 16384
22 if { [info exists WORKAREASIZE] } {
23 set _WORKAREASIZE $WORKAREASIZE
25 set _WORKAREASIZE 0x4000
29 adapter_nsrst_delay 100
32 #use combined on interfaces or targets that can't set TRST/SRST separately
33 reset_config srst_only
36 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
37 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
39 set _TARGETNAME $_CHIPNAME.cpu
40 target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
43 # At reset the pic32mx does not allow code execution from RAM
44 # we have to setup the BMX registers to allow this.
45 # One limitation is that we loose the first 2k of RAM.
48 global _PIC32MX_DATASIZE
49 global _PIC32MX_PROGSIZE
50 set _PIC32MX_DATASIZE 0x800
51 set _PIC32MX_PROGSIZE [expr ($_WORKAREASIZE - $_PIC32MX_DATASIZE)]
53 $_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_PIC32MX_PROGSIZE -work-area-backup 0
54 $_TARGETNAME configure -event reset-init {
56 # from reset the pic32 cannot execute code in ram - enable ram execution
57 # minimum offset from start of ram is 2k
60 global _PIC32MX_DATASIZE
61 global _PIC32MX_PROGSIZE
64 mww 0xbf882000 0x001f0040
65 # BMXDKPBA: 2k kernel data @ 0xa0000800
66 mww 0xbf882010 $_PIC32MX_DATASIZE
67 # BMXDUDBA: 16k kernel program @ 0xa0000800
68 mww 0xbf882020 $_PIC32MX_PROGSIZE
69 # BMXDUPBA: 0k user program
70 mww 0xbf882030 $_PIC32MX_PROGSIZE
73 set _FLASHNAME $_CHIPNAME.flash
74 flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
75 set _FLASHNAME $_CHIPNAME.flash
76 flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
78 # For more information about the configuration files, take a look at:
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