tcl/target/mdr32f9q2i.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 # MDR32F9Q2I (1986ВЕ92У)
   4 # http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=57&cntnt01returnid=68
   5
   6 source [find target/swj-dp.tcl]
   7
   8 if { [info exists CHIPNAME] } {
   9    set _CHIPNAME $CHIPNAME
  10 } else {
  11    set _CHIPNAME mdr32f9q2i
  12 }
  13
  14 if { [info exists ENDIAN] } {
  15    set _ENDIAN $ENDIAN
  16 } else {
  17    set _ENDIAN little
  18 }
  19
  20 # Work-area is a space in RAM used for flash programming
  21 if { [info exists WORKAREASIZE] } {
  22    set _WORKAREASIZE $WORKAREASIZE
  23 } else {
  24    set _WORKAREASIZE 0x8000
  25 }
  26
  27 #jtag scan chain
  28 if { [info exists CPUTAPID] } {
  29    set _CPUTAPID $CPUTAPID
  30 } else {
  31    if { [using_jtag] } {
  32       set _CPUTAPID 0x4ba00477
  33    } {
  34       # SWD IDCODE
  35       set _CPUTAPID 0x2ba01477
  36    }
  37 }
  38 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  39 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  40
  41 set _TARGETNAME $_CHIPNAME.cpu
  42 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
  43
  44 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  45
  46 # can't handle overlapping memory regions
  47 if { [info exists IMEMORY] && [string equal $IMEMORY true] } {
  48    flash bank ${_CHIPNAME}_info.flash mdr 0x08000000 0x01000 0 0 $_TARGETNAME 1 1 4
  49 } else {
  50    flash bank $_CHIPNAME.flash mdr 0x08000000 0x20000 0 0 $_TARGETNAME 0 32 4
  51 }
  52
  53 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
  54 adapter speed 1000
  55
  56 adapter srst delay 100
  57 if {[using_jtag]} {
  58    jtag_ntrst_delay 100
  59 }
  60
  61 if {![using_hla]} {
  62    # if srst is not fitted use SYSRESETREQ to
  63    # perform a soft reset
  64    cortex_m reset_config sysresetreq
  65 }