tcl/target/mdr32f9q2i.cfg

   1 # MDR32F9Q2I (1986ВЕ92У)
   2 # http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=57&cntnt01returnid=68
   3
   4 if { [info exists CHIPNAME] } {
   5    set _CHIPNAME $CHIPNAME
   6 } else {
   7    set _CHIPNAME mdr32f9q2i
   8 }
   9
  10 if { [info exists ENDIAN] } {
  11    set _ENDIAN $ENDIAN
  12 } else {
  13    set _ENDIAN little
  14 }
  15
  16 # Work-area is a space in RAM used for flash programming
  17 if { [info exists WORKAREASIZE] } {
  18    set _WORKAREASIZE $WORKAREASIZE
  19 } else {
  20    set _WORKAREASIZE 0x8000
  21 }
  22
  23 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
  24 adapter_khz 1000
  25
  26 adapter_nsrst_delay 100
  27 jtag_ntrst_delay 100
  28
  29 #jtag scan chain
  30 if { [info exists CPUTAPID] } {
  31    set _CPUTAPID $CPUTAPID
  32 } else {
  33    set _CPUTAPID 0x4ba00477
  34 }
  35 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  36
  37 set _TARGETNAME $_CHIPNAME.cpu
  38 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  39
  40 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  41
  42 # can't handle overlapping memory regions
  43 if { [info exists IMEMORY] && [string equal $IMEMORY true] } {
  44    flash bank ${_CHIPNAME}_info.flash mdr 0x08000000 0x01000 0 0 $_TARGETNAME 1 1 4
  45 } else {
  46    flash bank $_CHIPNAME.flash mdr 0x08000000 0x20000 0 0 $_TARGETNAME 0 32 4
  47 }
  48
  49 # if srst is not fitted use SYSRESETREQ to
  50 # perform a soft reset
  51 cortex_m reset_config sysresetreq