tcl/target/mdr32f9q2i.cfg

   1 # MDR32F9Q2I (1986ВЕ92У)
   2 # http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=57&cntnt01returnid=68
   3
   4 source [find target/swj-dp.tcl]
   5
   6 if { [info exists CHIPNAME] } {
   7    set _CHIPNAME $CHIPNAME
   8 } else {
   9    set _CHIPNAME mdr32f9q2i
  10 }
  11
  12 if { [info exists ENDIAN] } {
  13    set _ENDIAN $ENDIAN
  14 } else {
  15    set _ENDIAN little
  16 }
  17
  18 # Work-area is a space in RAM used for flash programming
  19 if { [info exists WORKAREASIZE] } {
  20    set _WORKAREASIZE $WORKAREASIZE
  21 } else {
  22    set _WORKAREASIZE 0x8000
  23 }
  24
  25 #jtag scan chain
  26 if { [info exists CPUTAPID] } {
  27    set _CPUTAPID $CPUTAPID
  28 } else {
  29    if { [using_jtag] } {
  30       set _CPUTAPID 0x4ba00477
  31    } {
  32       # SWD IDCODE
  33       set _CPUTAPID 0x2ba01477
  34    }
  35 }
  36 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  37
  38 set _TARGETNAME $_CHIPNAME.cpu
  39 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  40
  41 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  42
  43 # can't handle overlapping memory regions
  44 if { [info exists IMEMORY] && [string equal $IMEMORY true] } {
  45    flash bank ${_CHIPNAME}_info.flash mdr 0x08000000 0x01000 0 0 $_TARGETNAME 1 1 4
  46 } else {
  47    flash bank $_CHIPNAME.flash mdr 0x08000000 0x20000 0 0 $_TARGETNAME 0 32 4
  48 }
  49
  50 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
  51 adapter_khz 1000
  52
  53 adapter_nsrst_delay 100
  54 if {[using_jtag]} {
  55    jtag_ntrst_delay 100
  56 }
  57
  58 if {![using_hla]} {
  59    # if srst is not fitted use SYSRESETREQ to
  60    # perform a soft reset
  61    cortex_m reset_config sysresetreq
  62 }