at91samd: add chip IDs for SAMC20 and SAMC21 families
[openocd.git] / tcl / target / klx.cfg
1 #
2 # Freescale Kinetis KL series devices
3 #
4
5 source [find target/swj-dp.tcl]
6
7 if { [info exists CHIPNAME] } {
8 set _CHIPNAME $CHIPNAME
9 } else {
10 set _CHIPNAME klx
11 }
12
13 # Work-area is a space in RAM used for flash programming
14 # By default use 4kB
15 if { [info exists WORKAREASIZE] } {
16 set _WORKAREASIZE $WORKAREASIZE
17 } else {
18 set _WORKAREASIZE 0x1000
19 }
20
21 if { [info exists CPUTAPID] } {
22 set _CPUTAPID $CPUTAPID
23 } else {
24 set _CPUTAPID 0x0bc11477
25 }
26
27 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
28
29 set _TARGETNAME $_CHIPNAME.cpu
30 target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
31
32 # It is important that "kinetis mdm check_security" is called for
33 # 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
34 # causes "kinetis mdm check_security" to fail the first time openocd
35 # calls it when it tries to connect after the CPU has been power-cycled.
36 $_CHIPNAME.cpu configure -event examine-end {
37 kinetis mdm check_security
38 }
39
40 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
41
42 set _FLASHNAME $_CHIPNAME.flash
43 flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
44
45 # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
46 # specifies up to 1MHz for VLPR mode.
47 adapter_khz 1000
48
49 reset_config srst_nogate
50
51 if {![using_hla]} {
52 # if srst is not fitted use SYSRESETREQ to
53 # perform a soft reset
54 cortex_m reset_config sysresetreq
55 }
56
57 $_TARGETNAME configure -event reset-init {
58 # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
59 # specifies up to 24MHz for run mode; Table 17 of Sub-Family Data
60 # Sheet rev4 lists 25MHz as the maximum frequency.
61 adapter_khz 24000
62 }

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