tcl/target/klx.cfg

   1 #
   2 # NXP (former Freescale) Kinetis KL series devices
   3 # Also used for Cortex-M0+ equipped members of KVx and KE1xZ series
   4 #
   5
   6 source [find target/swj-dp.tcl]
   7
   8 if { [info exists CHIPNAME] } {
   9     set _CHIPNAME $CHIPNAME
  10 } else {
  11     set _CHIPNAME klx
  12 }
  13
  14 # Work-area is a space in RAM used for flash programming
  15 # By default use 1KiB
  16 if { [info exists WORKAREASIZE] } {
  17    set _WORKAREASIZE $WORKAREASIZE
  18 } else {
  19    set _WORKAREASIZE 0x400
  20 }
  21
  22 if { [info exists CPUTAPID] } {
  23     set _CPUTAPID $CPUTAPID
  24 } else {
  25     set _CPUTAPID 0x0bc11477
  26 }
  27
  28 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  29
  30 set _TARGETNAME $_CHIPNAME.cpu
  31 target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
  32
  33 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  34
  35 set _FLASHNAME $_CHIPNAME.pflash
  36 flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
  37 kinetis create_banks
  38
  39 # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
  40 # specifies up to 1MHz for VLPR mode and up to 24MHz for run mode;
  41 # Table 17 of Sub-Family Data Sheet rev4 lists 25MHz as the maximum frequency.
  42 adapter_khz 1000
  43
  44 reset_config srst_nogate
  45
  46 if {![using_hla]} {
  47    # Detect secured MCU or boot lock-up in RESET/WDOG loop
  48    $_CHIPNAME.cpu configure -event examine-start {
  49       kinetis mdm check_security
  50    }
  51
  52    # if srst is not fitted use SYSRESETREQ to
  53    # perform a soft reset
  54    cortex_m reset_config sysresetreq
  55 }
  56
  57 # Disable watchdog not to disturb OpenOCD algorithms running on MCU
  58 # (e.g. armv7m_checksum_memory() in verify_image)
  59 # Flash driver also disables watchdog before FTFA flash programming.
  60 $_TARGETNAME configure -event reset-init {
  61    kinetis disable_wdog
  62 }