ARM: "armv4_5" command prefix becomes "arm"
[openocd.git] / tcl / target / imx35.cfg
1 # imx35 config
2 #
3
4 reset_config trst_and_srst srst_gates_jtag
5
6 if { [info exists CHIPNAME] } {
7 set _CHIPNAME $CHIPNAME
8 } else {
9 set _CHIPNAME imx35
10 }
11
12 if { [info exists ENDIAN] } {
13 set _ENDIAN $ENDIAN
14 } else {
15 set _ENDIAN little
16 }
17
18 if { [info exists CPUTAPID ] } {
19 set _CPUTAPID $CPUTAPID
20 } else {
21 set _CPUTAPID 0x07b3601d
22 }
23
24 if { [info exists SDMATAPID ] } {
25 set _SDMATAPID $SDMATAPID
26 } else {
27 set _SDMATAPID 0x0882601d
28 }
29
30 if { [info exists ETBTAPID ] } {
31 set _ETBTAPID $ETBTAPID
32 } else {
33 set _ETBTAPID 0x2b900f0f
34 }
35
36 #========================================
37
38 jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
39 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
40
41 # No IDCODE for this TAP
42 jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0x0 -expected-id 0x0
43
44 jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
45
46 set _TARGETNAME $_CHIPNAME.cpu
47 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
48
49 proc power_restore {} { puts "Sensed power restore. No action." }
50 proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
51
52 # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
53 etm config $_TARGETNAME 16 normal full etb
54 etb config $_TARGETNAME $_CHIPNAME.etb

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