f12e8784e1aab65f18c51344fae5f429ca3b6240
[openocd.git] / tcl / target / imx27.cfg
1 # page 3-34 of "MCIMC27 Multimedia Applications Processor Reference Manual, Rev 0.3"
2 # SRST pulls TRST
3 #
4 # Without setting these options correctly you'll see all sorts
5 # of weird errors, e.g. MOE=0xe, invalid cpsr values, reset
6 # failing, etc.
7 reset_config trst_and_srst srst_pulls_trst
8
9 if { [info exists CHIPNAME] } {
10 set _CHIPNAME $CHIPNAME
11 } else {
12 set _CHIPNAME imx27
13 }
14
15 if { [info exists ENDIAN] } {
16 set _ENDIAN $ENDIAN
17 } else {
18 set _ENDIAN little
19 }
20
21
22 # Note above there are 2 taps
23
24 # The bs tap
25 if { [info exists BSTAPID ] } {
26 set _BSTAPID $BSTAPID
27 } else {
28 set _BSTAPID 0x1b900f0f
29 }
30 jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID
31
32 # The CPU tap
33 if { [info exists CPUTAPID ] } {
34 set _CPUTAPID $CPUTAPID
35 } else {
36 set _CPUTAPID 0x07926121
37 }
38 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
39
40 # Create the GDB Target.
41 set _TARGETNAME $_CHIPNAME.cpu
42 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
43 $_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 -work-area-size 0x8000 -work-area-backup 1
44 # Internal to the chip, there is 45K of SRAM
45 #
46
47 arm7_9 dcc_downloads enable

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