tcl/target/imx27.cfg

   1 # page 3-34 of "MCIMC27 Multimedia Applications Processor Reference Manual, Rev 0.3"
   2 # SRST pulls TRST
   3 #
   4 # Without setting these options correctly you'll see all sorts
   5 # of weird errors, e.g. MOE=0xe, invalid cpsr values, reset
   6 # failing, etc.
   7 reset_config trst_and_srst srst_pulls_trst
   8
   9 if { [info exists CHIPNAME] } {
  10    set _CHIPNAME $CHIPNAME
  11 } else {
  12    set _CHIPNAME imx27
  13 }
  14
  15 if { [info exists ENDIAN] } {
  16    set _ENDIAN $ENDIAN
  17 } else {
  18    set _ENDIAN little
  19 }
  20
  21
  22 # Note above there are 2 taps
  23
  24 # trace buffer
  25 if { [info exists ETBTAPID] } {
  26    set _ETBTAPID $ETBTAPID
  27 } else {
  28    set _ETBTAPID 0x1b900f0f
  29 }
  30 jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
  31
  32 # The CPU tap
  33 if { [info exists CPUTAPID] } {
  34    set _CPUTAPID $CPUTAPID
  35 } else {
  36    set _CPUTAPID 0x07926121
  37 }
  38 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  39
  40 # Create the GDB Target.
  41 set _TARGETNAME $_CHIPNAME.cpu
  42 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
  43 # REVISIT what operating environment sets up this virtual address mapping?
  44 $_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \
  45         -work-area-size 0x8000 -work-area-backup 1
  46 # Internal to the chip, there is 45K of SRAM
  47 #
  48
  49 arm7_9 dcc_downloads enable
  50
  51 # trace setup
  52 etm config $_TARGETNAME 16 normal full etb
  53 etb config $_TARGETNAME $_CHIPNAME.etb