e0c553fd28c28eb76c9d835d5930d349e069a1d9
[openocd.git] / tcl / target / efm32.cfg
1 #
2 # Silicon Labs (formerly Energy Micro) EFM32 target
3 #
4 # Note: All EFM32 chips have SWD support, but only newer series 1
5 # chips have JTAG support.
6 #
7
8 source [find target/swj-dp.tcl]
9
10 if { [info exists CHIPNAME] } {
11 set _CHIPNAME $CHIPNAME
12 } else {
13 set _CHIPNAME efm32
14 }
15
16 # Work-area is a space in RAM used for flash programming
17 # By default use 2kB
18 if { [info exists WORKAREASIZE] } {
19 set _WORKAREASIZE $WORKAREASIZE
20 } else {
21 set _WORKAREASIZE 0x800
22 }
23
24 if { [info exists CPUTAPID] } {
25 set _CPUTAPID $CPUTAPID
26 } else {
27 if { [using_jtag] } {
28 set _CPUTAPID 0x4ba00477
29 } {
30 set _CPUTAPID 0x2ba01477
31 }
32 }
33
34 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
35
36 adapter_khz 1000
37
38 set _TARGETNAME $_CHIPNAME.cpu
39 target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
40
41 $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
42
43 set _FLASHNAME $_CHIPNAME.flash
44 flash bank $_FLASHNAME efm32 0 0 0 0 $_TARGETNAME
45
46 if {![using_hla]} {
47 # if srst is not fitted use SYSRESETREQ to
48 # perform a soft reset
49 cortex_m reset_config sysresetreq
50 }

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