target/imx6ul: Initial support
[openocd.git] / tcl / target / bluenrg-x.cfg
1 #
2 # bluenrg-1/2 devices support only SWD transports.
3 #
4
5 source [find target/swj-dp.tcl]
6
7 if { [info exists CHIPNAME] } {
8 set _CHIPNAME $CHIPNAME
9 } else {
10 set _CHIPNAME bluenrg-1
11 }
12
13 set _ENDIAN little
14
15 # Work-area is a space in RAM used for flash programming
16 # By default use 24kB-256bytes
17 if { [info exists WORKAREASIZE] } {
18 set _WORKAREASIZE $WORKAREASIZE
19 } else {
20 set _WORKAREASIZE 0x5F00
21 }
22
23 adapter_khz 4000
24
25 if { [info exists CPUTAPID] } {
26 set _CPUTAPID $CPUTAPID
27 } else {
28 set _CPUTAPID 0x0bb11477
29 }
30
31 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
32 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
33
34 set _TARGETNAME $_CHIPNAME.cpu
35 set WDOG_VALUE 0
36 set WDOG_VALUE_SET 0
37
38 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
39
40 $_TARGETNAME configure -work-area-phys 0x20000100 -work-area-size $_WORKAREASIZE -work-area-backup 0
41
42 # flash size will be probed
43 set _FLASHNAME $_CHIPNAME.flash
44 flash bank $_FLASHNAME bluenrg-x 0 0 0 0 $_TARGETNAME
45
46 # In BlueNRG-X reset pin is actually a shutdown (power-off), so define reset as none
47 reset_config none
48
49 if {![using_hla]} {
50 # if srst is not fitted use SYSRESETREQ to
51 # perform a soft reset
52 cortex_m reset_config sysresetreq
53 }
54
55 $_TARGETNAME configure -event halted {
56 global WDOG_VALUE
57 global WDOG_VALUE_SET
58 # Stop watchdog during halt, if enabled
59 mem2array value 32 0x40700008 1
60 set WDOG_VALUE [expr ($value(0))]
61 if [expr ($value(0) & (1 << 1))] {
62 set WDOG_VALUE_SET 1
63 mww 0x40700008 [expr ($value(0) & 0xFFFFFFFD)]
64 }
65 }
66 $_TARGETNAME configure -event resumed {
67 global WDOG_VALUE
68 global WDOG_VALUE_SET
69 if [expr $WDOG_VALUE_SET] {
70 # Restore watchdog enable value after resume
71 mww 0x40700008 $WDOG_VALUE
72 set WDOG_VALUE_SET 0
73 }
74 }

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