tcl/target/atsame5x.cfg

   1 #
   2 # Microchip (former Atmel) SAM E54, E53, E51 and D51 devices
   3 # with a Cortex-M4 core
   4 #
   5
   6 #
   7 # Devices only support SWD transports.
   8 #
   9 source [find target/swj-dp.tcl]
  10
  11 if { [info exists CHIPNAME] } {
  12    set _CHIPNAME $CHIPNAME
  13 } else {
  14    set _CHIPNAME atsame5
  15 }
  16
  17 if { [info exists ENDIAN] } {
  18    set _ENDIAN $ENDIAN
  19 } else {
  20    set _ENDIAN little
  21 }
  22
  23 # Work-area is a space in RAM used for flash programming
  24 # By default use 32kB (the smallest RAM size is 128kB)
  25 if { [info exists WORKAREASIZE] } {
  26    set _WORKAREASIZE $WORKAREASIZE
  27 } else {
  28    set _WORKAREASIZE 0x8000
  29 }
  30
  31 if { [info exists CPUTAPID] } {
  32    set _CPUTAPID $CPUTAPID
  33 } else {
  34    set _CPUTAPID 0x4ba00477
  35 }
  36
  37 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  38 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  39
  40 set _TARGETNAME $_CHIPNAME.cpu
  41 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
  42
  43 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  44
  45 # SAM DSU will hold the CPU in reset if TCK is low when RESET_N
  46 # deasserts
  47 #
  48 # dsu_reset_deassert configures whether we want to run or halt out of reset,
  49 # then instruct the DSU to let us out of reset.
  50 $_TARGETNAME configure -event reset-deassert-post {
  51         atsame5 dsu_reset_deassert
  52 }
  53
  54 # SRST (wired to RESET_N) resets debug circuitry
  55 # srst_pulls_trst is not configured here to avoid an error raised in reset halt
  56 reset_config srst_gates_jtag
  57
  58 # Do not use a reset button with other SWD adapter than Atmel's EDBG.
  59 # DSU usually locks MCU in reset state until you issue a reset command
  60 # in OpenOCD.
  61
  62 # SAM E5x/D51 runs at SYSCLK = 48 MHz from RC oscillator after reset.
  63 # Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) works
  64 # without problem at clock speed over 5000 khz. Atmel recommends
  65 # adapter speed less than 10 * CPU clock.
  66 adapter_khz 2000
  67
  68 if {![using_hla]} {
  69    # if srst is not fitted use SYSRESETREQ to
  70    # perform a soft reset
  71    cortex_m reset_config sysresetreq
  72 }
  73
  74 set _FLASHNAME $_CHIPNAME.flash
  75 flash bank $_FLASHNAME atsame5 0x00000000 0 1 1 $_TARGETNAME