tcl/target/at91samdXX.cfg

   1 #
   2 # script for ATMEL samdXX, a CORTEX-M0 chip
   3 #
   4
   5 #
   6 # samdXX devices only support SWD transports.
   7 #
   8 source [find target/swj-dp.tcl]
   9
  10 if { [info exists CHIPNAME] } {
  11    set _CHIPNAME $CHIPNAME
  12 } else {
  13    set _CHIPNAME at91samd
  14 }
  15
  16 if { [info exists ENDIAN] } {
  17    set _ENDIAN $ENDIAN
  18 } else {
  19    set _ENDIAN little
  20 }
  21
  22 # Work-area is a space in RAM used for flash programming
  23 # By default use 2kB
  24 if { [info exists WORKAREASIZE] } {
  25    set _WORKAREASIZE $WORKAREASIZE
  26 } else {
  27    set _WORKAREASIZE 0x800
  28 }
  29
  30 if { [info exists CPUTAPID] } {
  31    set _CPUTAPID $CPUTAPID
  32 } else {
  33    set _CPUTAPID 0x4ba00477
  34 }
  35
  36 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  37
  38 set _TARGETNAME $_CHIPNAME.cpu
  39 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  40
  41 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  42
  43 $_TARGETNAME configure -event gdb-flash-erase-start {
  44     halt
  45 }
  46
  47 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
  48 #
  49 # Since we may be running of an RC oscilator, we crank down the speed a
  50 # bit more to be on the safe side. Perhaps superstition, but if are
  51 # running off a crystal, we can run closer to the limit. Note
  52 # that there can be a pretty wide band where things are more or less stable.
  53
  54 adapter_khz 500
  55 adapter_nsrst_delay 100
  56
  57 # if srst is not fitted use SYSRESETREQ to
  58 # perform a soft reset
  59 cortex_m reset_config sysresetreq
  60
  61 set _FLASHNAME $_CHIPNAME.flash
  62 flash bank $_FLASHNAME at91samd 0x00000000 0 1 1 $_TARGETNAME