tcl/target/at91sam7sx.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #use combined on interfaces or targets that can't set TRST/SRST separately
   4 reset_config srst_only srst_pulls_trst
   5
   6 if { [info exists CHIPNAME] } {
   7    set _CHIPNAME $CHIPNAME
   8 } else {
   9    set _CHIPNAME at91sam7s
  10 }
  11
  12 if { [info exists ENDIAN] } {
  13    set _ENDIAN $ENDIAN
  14 } else {
  15    set _ENDIAN little
  16 }
  17
  18 if { [info exists CPUTAPID] } {
  19    set _CPUTAPID $CPUTAPID
  20 } else {
  21    set _CPUTAPID 0x3f0f0f0f
  22 }
  23
  24 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  25
  26 set _TARGETNAME $_CHIPNAME.cpu
  27
  28 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
  29 $_TARGETNAME configure -event reset-init {
  30         soft_reset_halt
  31         # RSTC_CR : Reset peripherals
  32         mww 0xfffffd00 0xa5000004
  33         # disable watchdog
  34         mww 0xfffffd44 0x00008000
  35         # enable user reset
  36         mww 0xfffffd08 0xa5000001
  37         # CKGR_MOR : enable the main oscillator
  38         mww 0xfffffc20 0x00000601
  39         sleep 10
  40         # CKGR_PLLR: 96.1097 MHz
  41         mww 0xfffffc2c 0x00481c0e
  42         sleep 10
  43         # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
  44         mww 0xfffffc30 0x00000007
  45         sleep 10
  46         # MC_FMR: flash mode (FWS=1,FMCN=73)
  47         mww 0xffffff60 0x00490100
  48         sleep 100
  49 }
  50
  51 $_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
  52
  53 #flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
  54 set _FLASHNAME $_CHIPNAME.flash
  55 flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432