target: restructure dap support
[openocd.git] / tcl / target / adsp-sc58x.cfg
1 # Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
2
3 # evaluation boards by Analog Devices (and designs derived from them) use a non-standard 10-pin 0.05" ARM Cortex Debug Connector
4 # pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST
5 # as a result, a standards-compliant debug pod will only force the processor's debug interface into reset, preventing usage
6 # so, a connector adapter must be employed on these boards to isolate or otherwise prevent /TRST from being asserted
7
8 transport select swd
9 source [find target/swj-dp.tcl]
10
11 if { [info exists CHIPNAME] } {
12 set _CHIPNAME $CHIPNAME
13 } else {
14 set _CHIPNAME ADSP-SC58x
15 }
16
17 if { [info exists ENDIAN] } {
18 set _ENDIAN $ENDIAN
19 } else {
20 set _ENDIAN little
21 }
22
23 if { [info exists CPUTAPID] } {
24 set _CPUTAPID $CPUTAPID
25 } else {
26 set _CPUTAPID 0x3BA02477
27 }
28
29 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
30 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
31
32 set _TARGETNAME $_CHIPNAME.cpu
33 target create $_TARGETNAME cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap
34
35 $_TARGETNAME configure -event examine-end {
36 global _TARGETNAME
37 sc58x_enabledebug $_TARGETNAME
38 }
39
40 proc sc58x_enabledebug {target} {
41 # Enable debugging functionality by setting relevant bits in the TAPC_DBGCTL register
42 # the "phys" option is critical; the OpenOCD Cortex-A target code prevents normal mww when the target is not halted
43 # however, it is not possible to halt the target unless these register bits have been set
44 $target mww phys 0x31131000 0xFFFF
45 }
46

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