tcl/board/ti_beaglebone.cfg

   1 interface ft2232
   2 #ft2232_device_desc "BeagleBone A"
   3 ft2232_layout xds100v2
   4 ft2232_vid_pid 0x0403 0xa6d0
   5
   6 #jtag_rclk 10
   7 adapter_khz 1000
   8
   9 if { [info exists CHIPNAME] } {
  10    set _CHIPNAME $CHIPNAME
  11 } else {
  12    set _CHIPNAME am335x
  13 }
  14
  15 proc icepick_d_tapenable {jrc port} {
  16         # select router
  17         irscan $jrc 7 -endstate IRPAUSE
  18         drscan $jrc 8 0x89 -endstate DRPAUSE
  19
  20         # set ip control
  21         irscan $jrc 2 -endstate IRPAUSE
  22         drscan $jrc 32 [expr 0xa0002108 + ($port << 24)] -endstate DRPAUSE
  23
  24         # for icepick_D
  25         irscan $jrc 2 -endstate IRPAUSE
  26         drscan $jrc 32 0xe0002008 -endstate DRPAUSE
  27
  28         irscan $jrc 0x3F -endstate RUN/IDLE
  29         runtest 10
  30 }
  31
  32 #
  33 # M3 DAP
  34 #
  35 if { [info exists M3_DAP_TAPID] } {
  36         set _M3_DAP_TAPID $M3_DAP_TAPID
  37 } else {
  38         set _M3_DAP_TAPID 0x4b6b902f
  39 }
  40 jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
  41 jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11"
  42
  43 #
  44 # Main DAP
  45 #
  46 if { [info exists DAP_TAPID ] } {
  47    set _DAP_TAPID $DAP_TAPID
  48 } else {
  49    set _DAP_TAPID 0x4b6b902f
  50 }
  51 jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
  52 jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12"
  53
  54 #
  55 # ICEpick-D (JTAG route controller)
  56 #
  57 if { [info exists JRC_TAPID ] } {
  58    set _JRC_TAPID $JRC_TAPID
  59 } else {
  60    set _JRC_TAPID 0x0b94402f
  61 }
  62 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID
  63 jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
  64 # some TCK tycles are required to activate the DEBUG power domain
  65 jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
  66
  67 #
  68 # Cortex A8 target
  69 #
  70 set _TARGETNAME $_CHIPNAME.cpu
  71 target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap -dbgbase 0x80001000
  72
  73 # SRAM: 64K at 0x4030.0000; use the first 16K
  74 $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000
  75
  76 $_TARGETNAME configure -event reset-assert "am335x_dbginit $_TARGETNAME"
  77 $_TARGETNAME configure -event reset-assert-post "am335x_dbginit $_TARGETNAME"
  78
  79 $_TARGETNAME configure -event gdb-attach {
  80    global _TARGETNAME
  81    am335x_dbginit $_TARGETNAME
  82    echo "Halting target"
  83    halt
  84 }
  85
  86 # Run this to enable invasive debugging.  This is run automatically in the
  87 # reset sequence.
  88 proc am335x_dbginit {target} {
  89    # General Cortex A8 debug initialisation
  90    cortex_a8 dbginit
  91 }
  92