a0643f74ae6965a8cd1b4eee111151a59b9afc2b
[openocd.git] / tcl / board / telo.cfg
1 source [find target/c100.cfg]
2 # basic register defintion for C100
3 source [find target/c100regs.tcl]
4 # board-config info
5 source [find target/c100config.tcl]
6 # C100 helper functions
7 source [find target/c100helper.tcl]
8
9
10 # Telo board & C100 support trst and srst
11 # however openocd does not support
12 # 1. setting srst reset pulse width
13 # 2. setting delay between srst pulse and JTAG access
14 # This really makes the srst useless for now.
15 reset_config trst_and_srst separate
16
17
18
19 # issue telnet: reset init
20 # issue gdb: monitor reset init
21 $_TARGETNAME configure -event reset-init {
22 jtag_khz 100
23 # setup GPIO used as control signals for C100
24 setupGPIO
25 # This will allow acces to lower 8MB or NOR
26 lowGPIO5
27 # setup NOR size,timing,etc.
28 setupNOR
29 # setup internals + PLL + DDR2
30 initC100
31 #turn up the JTAG speed
32 jtag_khz 3000
33 puts "JTAG speek now 3MHz"
34 puts "type helpC100 to get help on C100"
35 }
36
37 $_TARGETNAME configure -event reset-deassert-post {
38 # Force target into ARM state.
39 # soft_reset_halt # not implemented on ARM11
40 puts "Detected SRSRT asserted on C100.CPU"
41
42 }
43
44 proc power_restore {} { puts "Sensed power restore. No action." }
45 proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
46
47
48 # boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
49 # it's really 16MB but the upper 8mb is controller via gpio
50 # openocd does not support 'complex reads/writes' to NOR
51 flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
52
53 # writing data to memory does not work without this
54 memwrite burst disable

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