tcl/board/spear320cpu.cfg

   1 # Configuration for the ST SPEAr320 CPU board
   2 # EVAL_SPEAr320CPU Rev. 2.0
   3 # http://www.st.com/spear
   4 #
   5 # Date:      2011-11-18
   6 # Author:    Antonio Borneo <borneo.antonio@gmail.com>
   7
   8 # The standard board has JTAG SRST not connected.
   9 # This script targets such boards using quirky code to bypass the issue.
  10
  11
  12 source [find mem_helper.tcl]
  13 source [find target/spear3xx.cfg]
  14 source [find chip/st/spear/spear3xx_ddr.tcl]
  15 source [find chip/st/spear/spear3xx.tcl]
  16
  17 arm7_9 dcc_downloads enable
  18 arm7_9 fast_memory_access enable
  19
  20
  21 # Serial NOR on SMI CS0. 8Mbyte.
  22 set _FLASHNAME1 $_CHIPNAME.snor
  23 flash bank $_FLASHNAME1 stmsmi 0xf8000000 0 0 0 $_TARGETNAME
  24
  25 if { [info exists BOARD_HAS_SRST] } {
  26         # Modified board has SRST on JTAG connector
  27         reset_config trst_and_srst separate srst_gates_jtag \
  28                 trst_push_pull srst_open_drain
  29 } else {
  30         # Standard board has no SRST on JTAG connector
  31         reset_config trst_only separate srst_gates_jtag trst_push_pull
  32         source [find chip/st/spear/quirk_no_srst.tcl]
  33 }
  34
  35 $_TARGETNAME configure -event reset-init { spear320cpu_init }
  36
  37 proc spear320cpu_init {} {
  38         reg pc 0xffff0020;      # loop forever
  39
  40         sp3xx_clock_default
  41         sp3xx_common_init
  42         sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $DDR_CHIPS
  43         sp320_init
  44 }