9daa7abd53da4a095c0300deb33afeba3cb94924
[openocd.git] / tcl / board / or1k_generic.cfg
1 # If you want to use the VJTAG TAP, you must set your FPGA TAP ID here
2 set FPGATAPID 0x020b30dd
3 # Choose your TAP core (VJTAG or MOHOR)
4 set TAP_TYPE VJTAG
5 # Set your chip name
6 set CHIPNAME or1200
7
8 source [find target/or1k.cfg]
9
10 # Set the adapter speed
11 adapter_khz 3000
12
13 # Enable the target description feature
14 gdb_target_description enable
15
16 # Add a new register in the cpu register list. This register will be
17 # included in the generated target descriptor file.
18 # format is addreg [name] [address] [feature] [reg_group]
19 addreg rtest 0x1234 org.gnu.gdb.or1k.group0 system
20
21 # Override default init_reset
22 proc init_reset {mode} {
23 soft_reset_halt
24 resume
25 }
26
27 # Target initialization
28 init
29 echo "Halting processor"
30 halt
31
32 foreach name [target names] {
33 set y [$name cget -endian]
34 set z [$name cget -type]
35 puts [format "Chip is %s, Endian: %s, type: %s" \
36 $name $y $z]
37 }
38
39 set c_blue "\033\[01;34m"
40 set c_reset "\033\[0m"
41
42 puts [format "%sTarget ready...%s" $c_blue $c_reset]

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