tcl/board/numato_mimas_a7.cfg

   1 #
   2 # Numato Mimas A7 - Artix 7 FPGA Board
   3 #
   4 # https://numato.com/product/mimas-a7-artix-7-fpga-development-board-with-ddr-sdram-and-gigabit-ethernet
   5 #
   6 # Note: Connect external DC power supply if programming a heavy design onto FPGA.
   7 #       Programming while powering via USB may lead to programming failure.
   8 #       Therefore, prefer external power supply.
   9
  10 adapter driver ftdi
  11 ftdi_device_desc "Mimas Artix 7 FPGA Module"
  12 ftdi_vid_pid 0x2a19 0x1009
  13
  14 # channel 0 is for custom purpose by users (like uart, fifo etc)
  15 # channel 1 is reserved for JTAG (by-default) or SPI (possible via changing solder jumpers)
  16 ftdi_channel 1
  17 ftdi_tdo_sample_edge falling
  18
  19
  20 # FTDI Pin Layout
  21 #
  22 # +--------+-------+-------+-------+-------+-------+-------+-------+
  23 # | DBUS7  | DBUS6 | DBUS5 | DBUS4 | DBUS3 | DBUS2 | DBUS1 | DBUS0 |
  24 # +--------+-------+-------+-------+-------+-------+-------+-------+
  25 # | PROG_B | OE_N  |  NC   |  NC   |  TMS  |  TDO  |  TDI  |  TCK  |
  26 # +--------+-------+-------+-------+-------+-------+-------+-------+
  27 #
  28 # OE_N is JTAG buffer output enable signal (active-low)
  29 # PROG_B is not used, so left as input to FTDI.
  30 #
  31 ftdi_layout_init 0x0008 0x004b
  32 reset_config none
  33 adapter_khz 30000
  34
  35 source [find cpld/xilinx-xc7.cfg]
  36 source [find cpld/jtagspi.cfg]