tcl/board/mini2440.cfg

   1 #-------------------------------------------------------------------------
   2 # Mini2440 Samsung s3c2440A Processor with 64MB DRAM, 64MB NAND, 2 MB N0R
   3 # NOTE: Configured for NAND boot (switch S2 in NANDBOOT)
   4 # 64 MB NAND (Samsung K9D1208V0M)
   5 # B Findlay  08/09
   6 #
   7 #   ----------- Important notes to help you on your way ----------
   8 # README:
   9 #     NOR/NAND Boot Switch - I have not read the vivi source, but from
  10 #     what I could tell from reading the registers it appears that vivi
  11 #     loads itself into DRAM and then flips NFCONT (0x4E000004) bits
  12 #     Mode (bit 0 = 1), and REG_nCE (bit 1 = 0) which maps the NAND
  13 #     FLASH at the bottom 64MB of memory. This essentially takes the
  14 #     NOR Flash out of the circuit so you can't trash it.
  15 #
  16 #     I adapted the samsung_s3c2440.cfg file which is why I did not
  17 #     include "source [find target/samsung_s3c2440.cfg]".  I believe
  18 #     the -work-area-phys 0x200000 is incorrect, but also had to pad
  19 #     some additional resets.  I didn't modify it as if it is working
  20 #     for someone, the work-area-phys is not used by most.
  21 #
  22 #     JTAG ADAPTER SPECIFIC
  23 #     IMPORTANT! Any JTAG device that uses ADAPTIVE CLOCKING will likely
  24 #     FAIL as the pin RTCK on the mini2440 10 pin JTAG Conn doesn't exist.
  25 #     This is Pin 11 (RTCK) on 20 pin JTAG connector. Therefore it is
  26 #     necessary to FORCE setting the clock. Normally this should be configured
  27 #     in the openocd.cfg file, but was placed here as it can be a tough
  28 #     problem to figure out.  THIS MAY NOT FIX YOUR PROBLEM.. I modified
  29 #     the openOCD driver jlink.c and posted it here. It may eventually end
  30 #     up changed in openOCD, but its a hack in the driver and really should
  31 #     be in the jtag layer (core.c me thinks), but haven't done it yet. My
  32 #     hack for jlink.c may be found here.
  33 #
  34 #     http://forum.sparkfun.com/viewtopic.php?t=16763&sid=946e65abdd3bab39cc7d90dee33ff135
  35 #
  36 #     Note: Also if you have a USB JTAG, you will need the USB library installed
  37 #     on your system "libusb-dev" or the make of openocd will fail. I *think*
  38 #     it's apt-get install libusb-dev.  When I made my config I only included
  39 #     --enable-jlink and --enable-usbdevs
  40 #
  41 #     I HAVE NOT Tested this throughly, so there could still be problems.
  42 #     But it should get you way ahead of the game from where I started.
  43 #     If you find problems (and fixes) please post them to
  44 #     openocd-development@lists.berlios.de and join the developers and
  45 #     check in fixes to this and anything else you find.  I do not
  46 #     provide support, but if you ask really nice and I see anything
  47 #     obvious I will tell you.. mostly just dig, fix, and submit to openocd.
  48 #
  49 #     best!   brfindla@yahoo.com   Nashua, NH USA
  50 #
  51 #     Recommended resources:
  52 #       - first two are the best Mini2440 resources anywhere
  53 #       - maintained by buserror... thanks guy!
  54 #
  55 #       http://bliterness.blogspot.com/
  56 #       http://code.google.com/p/mini2440/
  57 #
  58 #       others....
  59 #
  60 #       http://forum.sparkfun.com/viewforum.php?f=18
  61 #       http://labs.kernelconcepts.de/Publications/Micro24401/
  62 #       http://www.friendlyarm.net/home
  63 #       http://www.amontec.com/jtag_pinout.shtml
  64 #
  65 #-------------------------------------------------------------------------
  66 #
  67 #
  68 # Your openocd.cfg file should contain:
  69 # source [find interface/<yourjtag>.cfg]
  70 # source [find board/mini2440.cfg]
  71 #
  72 #
  73 #
  74 #-------------------------------------------------------------------------
  75 # Target configuration for the Samsung 2440 system on chip
  76 # Tested on a S3C2440 Evaluation board by keesj
  77 # Processor : ARM920Tid(wb) rev 0 (v4l)
  78 # Info: JTAG tap: s3c2440.cpu tap/device found: 0x0032409d
  79 #  (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0)
  80 #-------------------------------------------------------------------------
  81
  82 if { [info exists CHIPNAME] } {
  83    set  _CHIPNAME $CHIPNAME
  84 } else {
  85    set  _CHIPNAME s3c2440
  86 }
  87
  88 if { [info exists ENDIAN] } {
  89    set  _ENDIAN $ENDIAN
  90 } else {
  91   # this defaults to a bigendian
  92    set  _ENDIAN little
  93 }
  94
  95 if { [info exists CPUTAPID ] } {
  96    set _CPUTAPID $CPUTAPID
  97 } else {
  98   # force an error till we get a good number
  99    set _CPUTAPID 0x0032409d
 100 }
 101
 102 #jtag scan chain
 103 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 104
 105 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
 106 target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
 107 $_TARGETNAME configure -work-area-phys 0x40000000  -work-area-size 0x4000 -work-area-backup 1
 108
 109 #reset configuration
 110 jtag_nsrst_delay 100
 111 jtag_ntrst_delay 100
 112 reset_config trst_and_srst
 113
 114 #-------------------------------------------------------------------------
 115 # JTAG ADAPTER SPECIFIC
 116 # IMPORTANT! See README at top of this file.
 117 #-------------------------------------------------------------------------
 118
 119     jtag_khz 12000
 120     jtag interface
 121
 122 #-------------------------------------------------------------------------
 123 # GDB Setup
 124 #-------------------------------------------------------------------------
 125
 126     gdb_breakpoint_override hard
 127
 128 #------------------------------------------------
 129 # ARM SPECIFIC
 130 #------------------------------------------------
 131
 132     targets
 133   #  arm7_9 dcc_downloads enable
 134   #  arm7_9 fast_memory_access enable
 135
 136
 137     nand device s3c2440 0
 138
 139     jtag_nsrst_delay 100
 140     jtag_ntrst_delay 100
 141     reset_config trst_and_srst
 142     init
 143
 144     echo " "
 145     echo "-------------------------------------------"
 146     echo "--- login with - telnet localhost 4444  ---"
 147     echo "--- then type help_2440                 ---"
 148     echo "-------------------------------------------"
 149     echo " "
 150
 151
 152
 153 #------------------------------------------------
 154 # Processor Initialialization
 155 # Note: Processor writes can only occur when
 156 # the state is in SYSTEM. When you call init_2440
 157 # one of the first lines will tell you what state
 158 # you are in. If a linux image is booting
 159 # when you run this, it will not work
 160 # a vivi boot loader will run with this just
 161 # fine. The reg values were obtained by a combination
 162 # of figuring them out fromt the manual, and looking
 163 # at post vivi values with the debugger. Don't
 164 # place too much faith in them, but seem to work.
 165 #------------------------------------------------
 166
 167 proc init_2440 { } {
 168
 169     halt
 170     s3c2440.cpu curstate
 171
 172     #-----------------------------------------------
 173     # Set Processor Clocks - mini2440 xtal=12mHz
 174     # we set main clock for 405mHZ
 175     # we set the USB Clock for 48mHz
 176     # OM2 OM3 pulled to ground so main clock and
 177     # usb clock are off 12mHz xtal
 178     #-----------------------------------------------
 179
 180     mww phys 0x4C000014 0x00000005 #  Clock Divider control Reg
 181     mww phys 0x4C000000 0xFFFFFFFF #  LOCKTIME count register
 182     mww phys 0x4C000008 0x00038022 #  UPPLCON  USB clock config Reg
 183     mww phys 0x4C000004 0x0007F021 #  MPPLCON  Proc clock config Reg
 184
 185     #-----------------------------------------------
 186     # Configure Memory controller
 187     # BWSCON configures all banks, NAND, NOR, DRAM
 188     # DRAM - 64MB - 32 bit bus, uses BANKCON6 BANKCON7
 189     #-----------------------------------------------
 190
 191     mww phys 0x48000000 0x22111112 #  BWSCON - Bank and Bus Width
 192     mww phys 0x48000010 0x00001112 #  BANKCON4 - ?
 193     mww phys 0x4800001c 0x00018009 #  BANKCON6 - DRAM
 194     mww phys 0x48000020 0x00018009 #  BANKCON7 - DRAM
 195     mww phys 0x48000024 0x008E04EB #  REFRESH  - DRAM
 196     mww phys 0x48000028 0x000000B2 #  BANKSIZE - DRAM
 197     mww phys 0x4800002C 0x00000030 #  MRSRB6 - DRAM
 198     mww phys 0x48000030 0x00000030 #  MRSRB7 - DRAM
 199
 200     #-----------------------------------------------
 201     # Now port configuration for enables for memory
 202     # and other stuff.
 203     #-----------------------------------------------
 204
 205     mww phys 0x56000000 0x007FFFFF #  GPACON
 206
 207     mww phys 0x56000010 0x00295559 #  GPBCON
 208     mww phys 0x56000018 0x000003FF #  GPBUP (PULLUP ENABLE)
 209     mww phys 0x56000014 0x000007C2 #  GPBDAT
 210
 211     mww phys 0x56000020 0xAAAAA6AA #  GPCCON
 212     mww phys 0x56000028 0x0000FFFF #  GPCUP
 213     mww phys 0x56000024 0x00000020 #  GPCDAT
 214
 215     mww phys 0x56000030 0xAAAAAAAA #  GPDCON
 216     mww phys 0x56000038 0x0000FFFF #  GPDUP
 217
 218     mww phys 0x56000040 0xAAAAAAAA #  GPECON
 219     mww phys 0x56000048 0x0000FFFF #  GPEUP
 220
 221     mww phys 0x56000050 0x00001555 #  GPFCON
 222     mww phys 0x56000058 0x0000007F #  GPFUP
 223     mww phys 0x56000054 0x00000000 #  GPFDAT
 224
 225     mww phys 0x56000060 0x00150114 #  GPGCON
 226     mww phys 0x56000068 0x0000007F #  GPGUP
 227
 228     mww phys 0x56000070 0x0015AAAA #  GPHCON
 229     mww phys 0x56000078 0x000003FF #  GPGUP
 230
 231 }
 232
 233
 234
 235 proc flash_config { } {
 236
 237     #-----------------------------------------
 238     # Finish Flash Configuration
 239     #-----------------------------------------
 240
 241     halt
 242
 243     #flash configuration (K9D1208V0M: 512Mbit, x8, 3.3V, Mode: Normal, 1st gen)
 244     nand probe 0
 245     nand list
 246 }
 247
 248 proc flash_uboot { } {
 249
 250         # flash the u-Boot binary and reboot into it
 251         init_2440
 252         flash_config
 253         nand erase 0 0x0 0x40000
 254         nand write 0 /tftpboot/u-boot-nand512.bin 0 oob_softecc_kw
 255         resume
 256 }
 257
 258
 259 proc load_uboot { } {
 260         echo " "
 261         echo " "
 262         echo "----------------------------------------------------------"
 263         echo "---- Load U-Boot into RAM and execute it.              ---"
 264         echo "---- NOTE: loads, partially runs, and hangs            ---"
 265         echo "---- U-Boot is fine, this image runs from vivi.        ---"
 266         echo "---- I burned u-boot into NAND so I didn't finish      ---"
 267         echo "---- debugging it. I am leaving this here as it is     ---"
 268         echo "---- part of the way there if you want to fix it.      ---"
 269         echo "----                                                   ---"
 270         echo "---- mini2440 U-boot here:                             ---"
 271         echo "---- http://repo.or.cz/w/u-boot-openmoko/mini2440.git  ---"
 272         echo "---- Also this:                                        ---"
 273         echo "---- http://code.google.com/p/mini2440/wiki/MiniBringup --"
 274         echo "----------------------------------------------------------"
 275
 276         init_2440
 277         echo "Loading /tftpboot/u-boot-nand512.bin"
 278         load_image /tftpboot/u-boot-nand512.bin 0x33f80000 bin
 279         echo "Verifying image...."
 280         verify_image /tftpboot/u-boot-nand512.bin 0x33f80000 bin
 281         echo "jumping to u-boot"
 282         #bp 0x33f80068 4 hw
 283         reg 0 0
 284         reg 1 0
 285         reg 2 0
 286         reg 3 0
 287         reg 4 0x33f80000
 288         resume 0x33f80000
 289 }
 290
 291        # this may help a little bit debugging the load_uboot
 292 proc s {} {
 293         step
 294         reg
 295         armv4_5 disassemble 0x33F80068 0x10
 296 }
 297
 298 proc help_2440 {} {
 299     echo " "
 300     echo " "
 301     echo "-----------------------------------------------------------"
 302     echo "---- The following mini2440 funcs are supported        ----"
 303     echo "----   init_2440 - initialize clocks, DRAM, IO         ----"
 304     echo "----   flash_config - configures nand flash            ----"
 305     echo "----   load_uboot - loads uboot into ram               ----"
 306     echo "----   flash_uboot - flashes uboot to nand (untested)  ----"
 307     echo "----   help_2440 - this help display                   ----"
 308     echo "-----------------------------------------------------------"
 309     echo " "
 310     echo " "
 311 }
 312
 313
 314 #----------------------------------------------------------------------------
 315 #----------------------------------- END ------------------------------------
 316 #----------------------------------------------------------------------------