tcl/board/mini2440.cfg

   1 #-------------------------------------------------------------------------
   2 # Mini2440 Samsung s3c2440A Processor with 64MB DRAM, 64MB NAND, 2 MB N0R
   3 # NOTE: Configured for NAND boot (switch S2 in NANDBOOT)
   4 # 64 MB NAND (Samsung K9D1208V0M)
   5 # B Findlay  08/09
   6 #
   7 #   ----------- Important notes to help you on your way ----------
   8 # README:
   9 #     NOR/NAND Boot Switch - I have not read the vivi source, but from
  10 #     what I could tell from reading the registers it appears that vivi
  11 #     loads itself into DRAM and then flips NFCONT (0x4E000004) bits
  12 #     Mode (bit 0 = 1), and REG_nCE (bit 1 = 0) which maps the NAND
  13 #     FLASH at the bottom 64MB of memory. This essentially takes the
  14 #     NOR Flash out of the circuit so you can't trash it.
  15 #
  16 #     I adapted the samsung_s3c2440.cfg file which is why I did not
  17 #     include "source [find target/samsung_s3c2440.cfg]".  I believe
  18 #     the -work-area-phys 0x200000 is incorrect, but also had to pad
  19 #     some additional resets.  I didn't modify it as if it is working
  20 #     for someone, the work-area-phys is not used by most.
  21 #
  22 #     JTAG ADAPTER SPECIFIC
  23 #     IMPORTANT! Any JTAG device that uses ADAPTIVE CLOCKING will likely
  24 #     FAIL as the pin RTCK on the mini2440 10 pin JTAG Conn doesn't exist.
  25 #     This is Pin 11 (RTCK) on 20 pin JTAG connector. Therefore it is
  26 #     necessary to FORCE setting the clock. Normally this should be configured
  27 #     in the openocd.cfg file, but was placed here as it can be a tough
  28 #     problem to figure out.  THIS MAY NOT FIX YOUR PROBLEM.. I modified
  29 #     the openOCD driver jlink.c and posted it here. It may eventually end
  30 #     up changed in openOCD, but its a hack in the driver and really should
  31 #     be in the jtag layer (core.c me thinks), but haven't done it yet. My
  32 #     hack for jlink.c may be found here.
  33 #
  34 #     http://forum.sparkfun.com/viewtopic.php?t=16763&sid=946e65abdd3bab39cc7d90dee33ff135
  35 #
  36 #     Note: Also if you have a USB JTAG, you will need the USB library installed
  37 #     on your system "libusb-dev" or the make of openocd will fail. I *think*
  38 #     it's apt-get install libusb-dev.  When I made my config I only included
  39 #     --enable-jlink and --enable-usbdevs
  40 #
  41 #     I HAVE NOT Tested this throughly, so there could still be problems.
  42 #     But it should get you way ahead of the game from where I started.
  43 #     If you find problems (and fixes) please post them to
  44 #     openocd-development@lists.berlios.de and join the developers and
  45 #     check in fixes to this and anything else you find.  I do not
  46 #     provide support, but if you ask really nice and I see anything
  47 #     obvious I will tell you.. mostly just dig, fix, and submit to openocd.
  48 #
  49 #     best!   brfindla@yahoo.com   Nashua, NH USA
  50 #
  51 #     Recommended resources:
  52 #       - first two are the best Mini2440 resources anywhere
  53 #       - maintained by buserror... thanks guy!
  54 #
  55 #       http://bliterness.blogspot.com/
  56 #       http://code.google.com/p/mini2440/
  57 #
  58 #       others....
  59 #
  60 #       http://forum.sparkfun.com/viewforum.php?f=18
  61 #       http://labs.kernelconcepts.de/Publications/Micro24401/
  62 #       http://www.friendlyarm.net/home
  63 #       http://www.amontec.com/jtag_pinout.shtml
  64 #
  65 #-------------------------------------------------------------------------
  66 #
  67 #
  68 # Your openocd.cfg file should contain:
  69 # source [find interface/<yourjtag>.cfg]
  70 # source [find board/mini2440.cfg]
  71 #
  72 #
  73 #
  74
  75 # FIXME use some standard target config, maybe create one from this
  76 #
  77 #       source [find target/...cfg]
  78
  79 #-------------------------------------------------------------------------
  80 # Target configuration for the Samsung 2440 system on chip
  81 # Tested on a S3C2440 Evaluation board by keesj
  82 # Processor : ARM920Tid(wb) rev 0 (v4l)
  83 # Info: JTAG tap: s3c2440.cpu tap/device found: 0x0032409d
  84 #  (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0)
  85 #-------------------------------------------------------------------------
  86
  87 if { [info exists CHIPNAME] } {
  88    set  _CHIPNAME $CHIPNAME
  89 } else {
  90    set  _CHIPNAME s3c2440
  91 }
  92
  93 if { [info exists ENDIAN] } {
  94    set  _ENDIAN $ENDIAN
  95 } else {
  96   # this defaults to a bigendian
  97    set  _ENDIAN little
  98 }
  99
 100 if { [info exists CPUTAPID ] } {
 101    set _CPUTAPID $CPUTAPID
 102 } else {
 103   # force an error till we get a good number
 104    set _CPUTAPID 0x0032409d
 105 }
 106
 107 #jtag scan chain
 108 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 109
 110 set _TARGETNAME $_CHIPNAME.cpu
 111 target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
 112 $_TARGETNAME configure -work-area-phys 0x40000000  -work-area-size 0x4000 -work-area-backup 1
 113
 114 #reset configuration
 115 adapter_nsrst_delay 100
 116 jtag_ntrst_delay 100
 117 reset_config trst_and_srst
 118
 119 #-------------------------------------------------------------------------
 120 # JTAG ADAPTER SPECIFIC
 121 # IMPORTANT! See README at top of this file.
 122 #-------------------------------------------------------------------------
 123
 124     adapter_khz 12000
 125     jtag interface
 126
 127 #-------------------------------------------------------------------------
 128 # GDB Setup
 129 #-------------------------------------------------------------------------
 130
 131     gdb_breakpoint_override hard
 132
 133 #------------------------------------------------
 134 # ARM SPECIFIC
 135 #------------------------------------------------
 136
 137     targets
 138   #  arm7_9 dcc_downloads enable
 139   #  arm7_9 fast_memory_access enable
 140
 141
 142     nand device s3c2440 0
 143
 144     adapter_nsrst_delay 100
 145     jtag_ntrst_delay 100
 146     reset_config trst_and_srst
 147     init
 148
 149     echo " "
 150     echo "-------------------------------------------"
 151     echo "--- login with - telnet localhost 4444  ---"
 152     echo "--- then type help_2440                 ---"
 153     echo "-------------------------------------------"
 154     echo " "
 155
 156
 157
 158 #------------------------------------------------
 159 # Processor Initialialization
 160 # Note: Processor writes can only occur when
 161 # the state is in SYSTEM. When you call init_2440
 162 # one of the first lines will tell you what state
 163 # you are in. If a linux image is booting
 164 # when you run this, it will not work
 165 # a vivi boot loader will run with this just
 166 # fine. The reg values were obtained by a combination
 167 # of figuring them out fromt the manual, and looking
 168 # at post vivi values with the debugger. Don't
 169 # place too much faith in them, but seem to work.
 170 #------------------------------------------------
 171
 172 proc init_2440 { } {
 173
 174     halt
 175     s3c2440.cpu curstate
 176
 177     #-----------------------------------------------
 178     # Set Processor Clocks - mini2440 xtal=12mHz
 179     # we set main clock for 405mHZ
 180     # we set the USB Clock for 48mHz
 181     # OM2 OM3 pulled to ground so main clock and
 182     # usb clock are off 12mHz xtal
 183     #-----------------------------------------------
 184
 185     mww phys 0x4C000014 0x00000005 ;#  Clock Divider control Reg
 186     mww phys 0x4C000000 0xFFFFFFFF ;#  LOCKTIME count register
 187     mww phys 0x4C000008 0x00038022 ;#  UPPLCON  USB clock config Reg
 188     mww phys 0x4C000004 0x0007F021 ;#  MPPLCON  Proc clock config Reg
 189
 190     #-----------------------------------------------
 191     # Configure Memory controller
 192     # BWSCON configures all banks, NAND, NOR, DRAM
 193     # DRAM - 64MB - 32 bit bus, uses BANKCON6 BANKCON7
 194     #-----------------------------------------------
 195
 196     mww phys 0x48000000 0x22111112 ;#  BWSCON - Bank and Bus Width
 197     mww phys 0x48000010 0x00001112 ;#  BANKCON4 - ?
 198     mww phys 0x4800001c 0x00018009 ;#  BANKCON6 - DRAM
 199     mww phys 0x48000020 0x00018009 ;#  BANKCON7 - DRAM
 200     mww phys 0x48000024 0x008E04EB ;#  REFRESH  - DRAM
 201     mww phys 0x48000028 0x000000B2 ;#  BANKSIZE - DRAM
 202     mww phys 0x4800002C 0x00000030 ;#  MRSRB6 - DRAM
 203     mww phys 0x48000030 0x00000030 ;#  MRSRB7 - DRAM
 204
 205     #-----------------------------------------------
 206     # Now port configuration for enables for memory
 207     # and other stuff.
 208     #-----------------------------------------------
 209
 210     mww phys 0x56000000 0x007FFFFF ;#  GPACON
 211
 212     mww phys 0x56000010 0x00295559 ;#  GPBCON
 213     mww phys 0x56000018 0x000003FF ;#  GPBUP (PULLUP ENABLE)
 214     mww phys 0x56000014 0x000007C2 ;#  GPBDAT
 215
 216     mww phys 0x56000020 0xAAAAA6AA ;#  GPCCON
 217     mww phys 0x56000028 0x0000FFFF ;#  GPCUP
 218     mww phys 0x56000024 0x00000020 ;#  GPCDAT
 219
 220     mww phys 0x56000030 0xAAAAAAAA ;#  GPDCON
 221     mww phys 0x56000038 0x0000FFFF ;#  GPDUP
 222
 223     mww phys 0x56000040 0xAAAAAAAA ;#  GPECON
 224     mww phys 0x56000048 0x0000FFFF ;#  GPEUP
 225
 226     mww phys 0x56000050 0x00001555 ;#  GPFCON
 227     mww phys 0x56000058 0x0000007F ;#  GPFUP
 228     mww phys 0x56000054 0x00000000 ;#  GPFDAT
 229
 230     mww phys 0x56000060 0x00150114 ;#  GPGCON
 231     mww phys 0x56000068 0x0000007F ;#  GPGUP
 232
 233     mww phys 0x56000070 0x0015AAAA ;#  GPHCON
 234     mww phys 0x56000078 0x000003FF ;#  GPGUP
 235
 236 }
 237
 238
 239
 240 proc flash_config { } {
 241
 242     #-----------------------------------------
 243     # Finish Flash Configuration
 244     #-----------------------------------------
 245
 246     halt
 247
 248     #flash configuration (K9D1208V0M: 512Mbit, x8, 3.3V, Mode: Normal, 1st gen)
 249     nand probe 0
 250     nand list
 251 }
 252
 253 proc flash_uboot { } {
 254
 255         # flash the u-Boot binary and reboot into it
 256         init_2440
 257         flash_config
 258         nand erase 0 0x0 0x40000
 259         nand write 0 /tftpboot/u-boot-nand512.bin 0 oob_softecc_kw
 260         resume
 261 }
 262
 263
 264 proc load_uboot { } {
 265         echo " "
 266         echo " "
 267         echo "----------------------------------------------------------"
 268         echo "---- Load U-Boot into RAM and execute it.              ---"
 269         echo "---- NOTE: loads, partially runs, and hangs            ---"
 270         echo "---- U-Boot is fine, this image runs from vivi.        ---"
 271         echo "---- I burned u-boot into NAND so I didn't finish      ---"
 272         echo "---- debugging it. I am leaving this here as it is     ---"
 273         echo "---- part of the way there if you want to fix it.      ---"
 274         echo "----                                                   ---"
 275         echo "---- mini2440 U-boot here:                             ---"
 276         echo "---- http://repo.or.cz/w/u-boot-openmoko/mini2440.git  ---"
 277         echo "---- Also this:                                        ---"
 278         echo "---- http://code.google.com/p/mini2440/wiki/MiniBringup --"
 279         echo "----------------------------------------------------------"
 280
 281         init_2440
 282         echo "Loading /tftpboot/u-boot-nand512.bin"
 283         load_image /tftpboot/u-boot-nand512.bin 0x33f80000 bin
 284         echo "Verifying image...."
 285         verify_image /tftpboot/u-boot-nand512.bin 0x33f80000 bin
 286         echo "jumping to u-boot"
 287         #bp 0x33f80068 4 hw
 288         reg 0 0
 289         reg 1 0
 290         reg 2 0
 291         reg 3 0
 292         reg 4 0x33f80000
 293         resume 0x33f80000
 294 }
 295
 296        # this may help a little bit debugging the load_uboot
 297 proc s {} {
 298         step
 299         reg
 300         arm disassemble 0x33F80068 0x10
 301 }
 302
 303 proc help_2440 {} {
 304     echo " "
 305     echo " "
 306     echo "-----------------------------------------------------------"
 307     echo "---- The following mini2440 funcs are supported        ----"
 308     echo "----   init_2440 - initialize clocks, DRAM, IO         ----"
 309     echo "----   flash_config - configures nand flash            ----"
 310     echo "----   load_uboot - loads uboot into ram               ----"
 311     echo "----   flash_uboot - flashes uboot to nand (untested)  ----"
 312     echo "----   help_2440 - this help display                   ----"
 313     echo "-----------------------------------------------------------"
 314     echo " "
 315     echo " "
 316 }
 317
 318
 319 #----------------------------------------------------------------------------
 320 #----------------------------------- END ------------------------------------
 321 #----------------------------------------------------------------------------