tcl/board/imx28evk.cfg

   1 # The IMX28EVK eval board has a IMX28 chip
   2 # Tested on SCH-26241 Rev D board with Olimex ARM-USB-OCD
   3 # Date: 201-02-01
   4 # Authors: James Robinson & Fabio Estevam
   5
   6 source [find target/imx28.cfg]
   7 $_TARGETNAME configure -event gdb-attach { imx28evk_init }
   8 $_TARGETNAME configure -event reset-init { imx28evk_init }
   9
  10 proc imx28evk_init { } {
  11
  12         halt
  13
  14         #****************************
  15         # VDDD setting
  16         #****************************
  17         # set VDDD =1.55V =(0.8v + TRIG x 0.025v), TRIG=0x1e
  18         mww 0x80044010 0x0003F503
  19         mww 0x80044040 0x0002041E
  20
  21         #****************************
  22         # CLOCK set up
  23         #****************************
  24         # Power up PLL0 HW_CLKCTRL_PLL0CTRL0
  25         mww 0x80040000 0x00020000
  26         # Set up fractional dividers for CPU and EMI - HW_CLKCTRL_FRAC0
  27         # EMI - first set DIV_EMI to div-by-2 before programming frac divider
  28         mww 0x800400F0 0x80000002
  29
  30
  31         # CPU: CPUFRAC=19 480*18/29=454.7MHz, EMI: EMIFRAC=22, (480/2)*18/22=196.4MHz
  32         mww 0x800401B0 0x92921613
  33         # Clear the bypass bits for CPU and EMI clocks in HW_CLKCTRL_CLKSEQ_CLR
  34         mww 0x800401D8 0x00040080
  35         # HCLK = 227MHz,HW_CLKCTRL_HBUS DIV =0x2
  36         mww 0x80040060 0x00000002
  37
  38         #****************************
  39         # POWER up DCDD_VDDA (DDR2)
  40         #****************************
  41         # Now set the voltage level to 1.8V HW_POWER_VDDACTRL bits TRC=0xC
  42         mww 0x80044050 0x0000270C
  43
  44         #****************************
  45         # DDR2 DCDD_VDDA
  46         #****************************
  47         # First set up pin muxing and drive strength
  48         # Ungate module clock and bring out of reset HW_PINCTRL_CTRL_CLR
  49         mww 0x80018008 0xC0000000
  50
  51         #****************************
  52         # EMI PAD setting
  53         #****************************
  54         # Set up drive strength for EMI pins
  55         mww 0x80019B80 0x00030000
  56         #IOMUXC_SW_PAD_CTL_GRP_CTLDS
  57
  58         # Set up pin muxing for EMI, HW_PINCTRL_MUXSEL10, 11, 12, 13
  59         mww 0x800181A8 0xFFFFFFFF
  60         mww 0x800181B8 0xFFFFFFFF
  61         mww 0x800181C8 0xFFFFFFFF
  62         mww 0x800181D8 0xFFFFFFFF
  63
  64         #** Ungate EMI clock in CCM
  65         mww 0x800400F0 0x00000002
  66
  67         #============================================================================
  68         # DDR Controller Registers
  69         #============================================================================
  70         # Manufacturer:    Elpida
  71         # Device Part Number:    EDE1116AEBG
  72         # Clock Freq.:     200MHz
  73         # Density:         1Gb
  74         # Chip Selects:    1
  75         # Number of Banks: 8
  76         # Row address:     13
  77         # Column address:  10
  78         #============================================================================
  79         mww 0x800E0000 0x00000000
  80         mww 0x800E0040 0x00000000
  81         mww 0x800E0054 0x00000000
  82         mww 0x800E0058 0x00000000
  83         mww 0x800E005C 0x00000000
  84         mww 0x800E0060 0x00000000
  85         mww 0x800E0064 0x00000000
  86         mww 0x800E0068 0x00010101
  87         mww 0x800E006C 0x01010101
  88         mww 0x800E0070 0x000f0f01
  89         mww 0x800E0074 0x0102020A
  90         mww 0x800E007C 0x00010101
  91         mww 0x800E0080 0x00000100
  92         mww 0x800E0084 0x00000100
  93         mww 0x800E0088 0x00000000
  94         mww 0x800E008C 0x00000002
  95         mww 0x800E0090 0x01010000
  96         mww 0x800E0094 0x07080403
  97         mww 0x800E0098 0x06005003
  98         mww 0x800E009C 0x0A0000C8
  99         mww 0x800E00A0 0x02009C40
 100         mww 0x800E00A4 0x0002030C
 101         mww 0x800E00A8 0x0036B009
 102         mww 0x800E00AC 0x031A0612
 103         mww 0x800E00B0 0x02030202
 104         mww 0x800E00B4 0x00C8001C
 105         mww 0x800E00C0 0x00011900
 106         mww 0x800E00C4 0xffff0303
 107         mww 0x800E00C8 0x00012100
 108         mww 0x800E00CC 0xffff0303
 109         mww 0x800E00D0 0x00012100
 110         mww 0x800E00D4 0xffff0303
 111         mww 0x800E00D8 0x00012100
 112         mww 0x800E00DC 0xffff0303
 113         mww 0x800E00E0 0x00000003
 114         mww 0x800E00E8 0x00000000
 115         mww 0x800E0108 0x00000612
 116         mww 0x800E010C 0x01000f02
 117         mww 0x800E0114 0x00000200
 118         mww 0x800E0118 0x00020007
 119         mww 0x800E011C 0xf4004a27
 120         mww 0x800E0120 0xf4004a27
 121         mww 0x800E012C 0x07400300
 122         mww 0x800E0130 0x07400300
 123         mww 0x800E013C 0x00000005
 124         mww 0x800E0140 0x00000000
 125         mww 0x800E0144 0x00000000
 126         mww 0x800E0148 0x01000000
 127         mww 0x800E014C 0x01020408
 128         mww 0x800E0150 0x08040201
 129         mww 0x800E0154 0x000f1133
 130         mww 0x800E015C 0x00001f04
 131         mww 0x800E0160 0x00001f04
 132         mww 0x800E016C 0x00001f04
 133         mww 0x800E0170 0x00001f04
 134         mww 0x800E0288 0x00010000
 135         mww 0x800E028C 0x00030404
 136         mww 0x800E0290 0x00000003
 137         mww 0x800E02AC 0x01010000
 138         mww 0x800E02B0 0x01000000
 139         mww 0x800E02B4 0x03030000
 140         mww 0x800E02B8 0x00010303
 141         mww 0x800E02BC 0x01020202
 142         mww 0x800E02C0 0x00000000
 143         mww 0x800E02C4 0x02030303
 144         mww 0x800E02C8 0x21002103
 145         mww 0x800E02CC 0x00061200
 146         mww 0x800E02D0 0x06120612
 147         mww 0x800E02D4 0x04420442
 148         # Mode register 0 for CS1 and CS0, ok to program CS1 even if not used
 149         mww 0x800E02D8 0x00000000
 150         # Mode register 0 for CS2 and CS3, not supported in this processor
 151         mww 0x800E02DC 0x00040004
 152         # Mode register 1 for CS1 and CS0, ok to program CS1 even if not used
 153         mww 0x800E02E0 0x00000000
 154         # Mode register 1 for CS2 and CS3, not supported in this processor
 155         mww 0x800E02E4 0x00000000
 156         # Mode register 2 for CS1 and CS0, ok to program CS1 even if not used
 157         mww 0x800E02E8 0x00000000
 158         # Mode register 2 for CS2 and CS3, not supported in this processor
 159         mww 0x800E02EC 0x00000000
 160         # Mode register 3 for CS1 and CS0, ok to program CS1 even if not used
 161         mww 0x800E02F0 0x00000000
 162         # Mode register 3 for CS2 and CS3, not supported in this processor
 163         mww 0x800E02F4 0xffffffff
 164
 165         #**  start controller **#
 166         mww 0x800E0040 0x00000001
 167         # bit[0]: start
 168 }