reverse order of Jim stack trace output
[openocd.git] / tcl / board / eir.cfg
1 # Elector Internet Radio board
2 # http://www.ethernut.de/en/hardware/eir/index.html
3
4 source [find target/sam7se512.cfg]
5
6 $_TARGETNAME configure -event reset-init {
7 # WDT_MR, disable watchdog
8 mww 0xFFFFFD44 0x00008000
9
10 # RSTC_MR, enable user reset
11 mww 0xfffffd08 0xa5000001
12
13 # CKGR_MOR
14 mww 0xFFFFFC20 0x00000601
15 sleep 10
16
17 # CKGR_PLLR
18 mww 0xFFFFFC2C 0x00481c0e
19 sleep 10
20
21 # PMC_MCKR
22 mww 0xFFFFFC30 0x00000007
23 sleep 10
24
25 # PMC_IER
26 mww 0xFFFFFF60 0x00480100
27
28 #
29 # Enable SDRAM interface.
30 #
31
32 # Enable SDRAM control at PIO A.
33 mww 0xfffff474 0x3f800000 # PIO_BSR_OFF
34 mww 0xfffff404 0x3f800000 # PIO_PDR_OFF
35
36 # Enable address bus (A0, A2-A11, A13-A17) at PIO B
37 mww 0xfffff674 0x0003effd # PIO_BSR_OFF
38 mww 0xfffff604 0x0003effd # PIO_PDR_OFF
39
40 # Enable 16 bit data bus at PIO C
41 mww 0xfffff870 0x0000ffff # PIO_ASR_OFF
42 mww 0xfffff804 0x0000ffff # PIO_PDR_OFF
43
44 # Enable SDRAM chip select
45 mww 0xffffff80 0x00000002 # EBI_CSA_OFF
46
47 # Set SDRAM characteristics in configuration register.
48 # Hard coded values for MT48LC32M16A2 with 48MHz CPU.
49 mww 0xffffffb8 0x2192215a # SDRAMC_CR_OFF
50 sleep 10
51
52 # Issue 16 bit SDRAM command: NOP
53 mww 0xffffffb0 0x00000011 # SDRAMC_MR_OFF
54 mww 0x20000000 0x00000000
55
56 # Issue 16 bit SDRAM command: Precharge all
57 mww 0xffffffb0 0x00000012 # SDRAMC_MR_OFF
58 mww 0x20000000 0x00000000
59
60 # Issue 8 auto-refresh cycles
61 mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
62 mww 0x20000000 0x00000000
63 mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
64 mww 0x20000000 0x00000000
65 mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
66 mww 0x20000000 0x00000000
67 mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
68 mww 0x20000000 0x00000000
69 mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
70 mww 0x20000000 0x00000000
71 mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
72 mww 0x20000000 0x00000000
73 mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
74 mww 0x20000000 0x00000000
75 mww 0xffffffb0 0x00000014 # SDRAMC_MR_OFF
76 mww 0x20000000 0x00000000
77
78 # Issue 16 bit SDRAM command: Set mode register
79 mww 0xffffffb0 0x00000013 # SDRAMC_MR_OFF
80 mww 0x20000014 0xcafedede
81
82 # Set refresh rate count ???
83 mww 0xffffffb4 0x00000013 # SDRAMC_TR_OFF
84
85 # Issue 16 bit SDRAM command: Normal mode
86 mww 0xffffffb0 0x00000010 # SDRAMC_MR_OFF
87 mww 0x20000000 0x00000180
88
89 #
90 # Enable external reset key.
91 #
92 mww 0xfffffd08 0xa5000001
93 }
94

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